Combine smi and overflow checks for count operations.

src/assembler-ia32.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 45 matching lines @@
 // doing certain constant folds, which may significantly reduce the
 // code generated for some assembly instructions (because they boil down
 // to a few constants). If this is a problem, we could change the code
 // such that we use an enum in optimized mode, and the struct in debug
 // mode. This way we get the compile-time error checking in debug mode
 // and best performance in optimized code.
 //
 struct Register {
   bool is_valid() const  { return 0 <= code_ && code_ < 8; }
   bool is(Register reg) const  { return code_ == reg.code_; }
+  // eax, ebx, ecx and edx are byte registers, the rest are not.
+  bool is_byte_register() const  { return code_ <= 3; }
   int code() const  {
     ASSERT(is_valid());
     return code_;
   }
   int bit() const  {
     ASSERT(is_valid());
     return 1 << code_;
   }
 
   // (unfortunately we can't make this private in a struct)
@@ skipping 596 matching lines @@
   void ftst();
   void fucomp(int i);
   void fucompp();
   void fcompp();
   void fnstsw_ax();
   void fwait();
 
   void frndint();
 
   void sahf();
+  void setcc(Condition cc, Register reg);
 
   void cpuid();
 
   // SSE2 instructions
   void cvttss2si(Register dst, const Operand& src);
   void cvttsd2si(Register dst, const Operand& src);
 
   void cvtsi2sd(XMMRegister dst, const Operand& src);
 
   void addsd(XMMRegister dst, XMMRegister src);
@@ skipping 150 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ASSEMBLER_IA32_H_