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Side by Side Diff: src/x64/macro-assembler-x64.h

Issue 1760253003: [crankshaft] Support ES6 tail call elimination. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@tco-crank-2
Patch Set: Addressing comments Created 4 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_X64_MACRO_ASSEMBLER_X64_H_ 5 #ifndef V8_X64_MACRO_ASSEMBLER_X64_H_
6 #define V8_X64_MACRO_ASSEMBLER_X64_H_ 6 #define V8_X64_MACRO_ASSEMBLER_X64_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/bailout-reason.h" 9 #include "src/bailout-reason.h"
10 #include "src/base/flags.h" 10 #include "src/base/flags.h"
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
49 kPointersToHereMaybeInteresting, 49 kPointersToHereMaybeInteresting,
50 kPointersToHereAreAlwaysInteresting 50 kPointersToHereAreAlwaysInteresting
51 }; 51 };
52 52
53 enum class SmiOperationConstraint { 53 enum class SmiOperationConstraint {
54 kPreserveSourceRegister = 1 << 0, 54 kPreserveSourceRegister = 1 << 0,
55 kBailoutOnNoOverflow = 1 << 1, 55 kBailoutOnNoOverflow = 1 << 1,
56 kBailoutOnOverflow = 1 << 2 56 kBailoutOnOverflow = 1 << 2
57 }; 57 };
58 58
59 enum class ReturnAddressState { kOnStack, kNotOnStack };
60
59 typedef base::Flags<SmiOperationConstraint> SmiOperationConstraints; 61 typedef base::Flags<SmiOperationConstraint> SmiOperationConstraints;
60 62
61 DEFINE_OPERATORS_FOR_FLAGS(SmiOperationConstraints) 63 DEFINE_OPERATORS_FOR_FLAGS(SmiOperationConstraints)
62 64
63 #ifdef DEBUG 65 #ifdef DEBUG
64 bool AreAliased(Register reg1, 66 bool AreAliased(Register reg1,
65 Register reg2, 67 Register reg2,
66 Register reg3 = no_reg, 68 Register reg3 = no_reg,
67 Register reg4 = no_reg, 69 Register reg4 = no_reg,
68 Register reg5 = no_reg, 70 Register reg5 = no_reg,
(...skipping 294 matching lines...) Expand 10 before | Expand all | Expand 10 after
363 void InitializeRootRegister() { 365 void InitializeRootRegister() {
364 ExternalReference roots_array_start = 366 ExternalReference roots_array_start =
365 ExternalReference::roots_array_start(isolate()); 367 ExternalReference::roots_array_start(isolate());
366 Move(kRootRegister, roots_array_start); 368 Move(kRootRegister, roots_array_start);
367 addp(kRootRegister, Immediate(kRootRegisterBias)); 369 addp(kRootRegister, Immediate(kRootRegisterBias));
368 } 370 }
369 371
370 // --------------------------------------------------------------------------- 372 // ---------------------------------------------------------------------------
371 // JavaScript invokes 373 // JavaScript invokes
372 374
375 // Removes current frame and its arguments from the stack preserving
376 // the arguments and a return address pushed to the stack for the next call.
377 // |ra_state| defines whether return address is already pushed to stack or
378 // not. Both |callee_args_count| and |caller_args_count_reg| do not include
379 // receiver. |callee_args_count| is not modified, |caller_args_count_reg|
380 // is trashed.
381 void PrepareForTailCall(const ParameterCount& callee_args_count,
382 Register caller_args_count_reg, Register scratch0,
383 Register scratch1, ReturnAddressState ra_state);
384
373 // Invoke the JavaScript function code by either calling or jumping. 385 // Invoke the JavaScript function code by either calling or jumping.
374 void InvokeFunctionCode(Register function, Register new_target, 386 void InvokeFunctionCode(Register function, Register new_target,
375 const ParameterCount& expected, 387 const ParameterCount& expected,
376 const ParameterCount& actual, InvokeFlag flag, 388 const ParameterCount& actual, InvokeFlag flag,
377 const CallWrapper& call_wrapper); 389 const CallWrapper& call_wrapper);
378 390
379 void FloodFunctionIfStepping(Register fun, Register new_target, 391 void FloodFunctionIfStepping(Register fun, Register new_target,
380 const ParameterCount& expected, 392 const ParameterCount& expected,
381 const ParameterCount& actual); 393 const ParameterCount& actual);
382 394
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1007 } 1019 }
1008 int CallSize(Register target) { 1020 int CallSize(Register target) {
1009 // Opcode: REX_opt FF /2 m64 1021 // Opcode: REX_opt FF /2 m64
1010 return (target.high_bit() != 0) ? 3 : 2; 1022 return (target.high_bit() != 0) ? 3 : 2;
1011 } 1023 }
1012 int CallSize(const Operand& target) { 1024 int CallSize(const Operand& target) {
1013 // Opcode: REX_opt FF /2 m64 1025 // Opcode: REX_opt FF /2 m64
1014 return (target.requires_rex() ? 2 : 1) + target.operand_size(); 1026 return (target.requires_rex() ? 2 : 1) + target.operand_size();
1015 } 1027 }
1016 1028
1017 // Emit call to the code we are currently generating.
1018 void CallSelf() {
1019 Handle<Code> self(reinterpret_cast<Code**>(CodeObject().location()));
1020 Call(self, RelocInfo::CODE_TARGET);
1021 }
1022
1023 // Non-SSE2 instructions. 1029 // Non-SSE2 instructions.
1024 void Pextrd(Register dst, XMMRegister src, int8_t imm8); 1030 void Pextrd(Register dst, XMMRegister src, int8_t imm8);
1025 void Pinsrd(XMMRegister dst, Register src, int8_t imm8); 1031 void Pinsrd(XMMRegister dst, Register src, int8_t imm8);
1026 void Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8); 1032 void Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
1027 1033
1028 void Lzcntq(Register dst, Register src); 1034 void Lzcntq(Register dst, Register src);
1029 void Lzcntq(Register dst, const Operand& src); 1035 void Lzcntq(Register dst, const Operand& src);
1030 1036
1031 void Lzcntl(Register dst, Register src); 1037 void Lzcntl(Register dst, Register src);
1032 void Lzcntl(Register dst, const Operand& src); 1038 void Lzcntl(Register dst, const Operand& src);
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1753 } \ 1759 } \
1754 masm-> 1760 masm->
1755 #else 1761 #else
1756 #define ACCESS_MASM(masm) masm-> 1762 #define ACCESS_MASM(masm) masm->
1757 #endif 1763 #endif
1758 1764
1759 } // namespace internal 1765 } // namespace internal
1760 } // namespace v8 1766 } // namespace v8
1761 1767
1762 #endif // V8_X64_MACRO_ASSEMBLER_X64_H_ 1768 #endif // V8_X64_MACRO_ASSEMBLER_X64_H_
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