Index: src/arm64/assembler-arm64-inl.h |
diff --git a/src/arm64/assembler-arm64-inl.h b/src/arm64/assembler-arm64-inl.h |
index aeca563c37f577b5a2582ea3605c026d6ca23704..e778ded67f4239530ea33aa8f5d2988d8d529aac 100644 |
--- a/src/arm64/assembler-arm64-inl.h |
+++ b/src/arm64/assembler-arm64-inl.h |
@@ -41,6 +41,19 @@ void RelocInfo::set_target_address(Address target, |
} |
} |
+void RelocInfo::update_wasm_memory_reference( |
+ Address old_base, Address new_base, size_t old_size, size_t new_size, |
+ ICacheFlushMode icache_flush_mode) { |
+ DCHECK(IsWasmMemoryReference(rmode_)); |
+ DCHECK(old_size <= new_size); |
titzer
2016/03/14 15:23:38
Same comments as on arm.
gdeepti1
2016/03/14 20:08:14
Fixed for all architectures.
|
+ DCHECK(old_base <= wasm_memory_reference() && |
+ wasm_memory_reference() <= old_base + old_size); |
+ Address updated_reference = wasm_memory_reference() + (new_base - old_base); |
+ DCHECK(new_base <= updated_reference && |
+ updated_reference <= new_base + new_size); |
+ Assembler::set_target_address_at(isolate_, pc_, host_, updated_reference, |
+ icache_flush_mode); |
+} |
inline int CPURegister::code() const { |
DCHECK(IsValid()); |
@@ -693,6 +706,10 @@ Address RelocInfo::target_address() { |
return Assembler::target_address_at(pc_, host_); |
} |
+Address RelocInfo::wasm_memory_reference() { |
+ DCHECK(IsWasmMemoryReference(rmode_)); |
+ return Assembler::target_address_at(pc_, host_); |
+} |
Address RelocInfo::target_address_address() { |
DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) |