Index: src/arm64/assembler-arm64-inl.h |
diff --git a/src/arm64/assembler-arm64-inl.h b/src/arm64/assembler-arm64-inl.h |
index aeca563c37f577b5a2582ea3605c026d6ca23704..2aaaa726c1c0f3f1f2eabc817f4df8bf69d7c672 100644 |
--- a/src/arm64/assembler-arm64-inl.h |
+++ b/src/arm64/assembler-arm64-inl.h |
@@ -41,6 +41,17 @@ void RelocInfo::set_target_address(Address target, |
} |
} |
+void RelocInfo::update_wasm_memory_reference( |
+ Address old_base, Address new_base, size_t old_size, size_t new_size, |
+ ICacheFlushMode icache_flush_mode) { |
+ DCHECK(IsWasmMemoryReference(rmode_)); |
+ DCHECK(new_size > old_size); |
+ DCHECK(old_base + old_size >= wasm_memory_reference()); |
+ Address updated_reference = wasm_memory_reference() + (new_base - old_base); |
+ DCHECK(new_base + new_size >= updated_reference); |
+ Assembler::set_target_address_at(isolate_, pc_, host_, updated_reference, |
Yang
2016/03/08 05:41:50
There doesn't seem to be anything platform depende
gdeepti1
2016/03/09 04:01:43
Added it in platform specific headers because that
gdeepti1
2016/03/11 03:55:51
Update from previous comment - the bounds checking
|
+ icache_flush_mode); |
+} |
inline int CPURegister::code() const { |
DCHECK(IsValid()); |
@@ -693,6 +704,10 @@ Address RelocInfo::target_address() { |
return Assembler::target_address_at(pc_, host_); |
} |
+Address RelocInfo::wasm_memory_reference() { |
+ DCHECK(IsWasmMemoryReference(rmode_)); |
+ return Assembler::target_address_at(pc_, host_); |
+} |
Address RelocInfo::target_address_address() { |
DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) |