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Issue 1758003003: [turbofan] ARM: Reduce out-of-line NaN code size (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_ARM 9 #if V8_TARGET_ARCH_ARM
10 10
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3208 float sm_value = get_float_from_s_register(m); 3208 float sm_value = get_float_from_s_register(m);
3209 float sd_value = fast_sqrt(sm_value, isolate_); 3209 float sd_value = fast_sqrt(sm_value, isolate_);
3210 sd_value = canonicalizeNaN(sd_value); 3210 sd_value = canonicalizeNaN(sd_value);
3211 set_s_register_from_float(d, sd_value); 3211 set_s_register_from_float(d, sd_value);
3212 } 3212 }
3213 } else if (instr->Opc3Value() == 0x0) { 3213 } else if (instr->Opc3Value() == 0x0) {
3214 // vmov immediate. 3214 // vmov immediate.
3215 if (instr->SzValue() == 0x1) { 3215 if (instr->SzValue() == 0x1) {
3216 set_d_register_from_double(vd, instr->DoubleImmedVmov()); 3216 set_d_register_from_double(vd, instr->DoubleImmedVmov());
3217 } else { 3217 } else {
3218 UNREACHABLE(); // Not used by v8. 3218 set_s_register_from_float(d, instr->DoubleImmedVmov());
3219 } 3219 }
3220 } else if (((instr->Opc2Value() == 0x6)) && (instr->Opc3Value() == 0x3)) { 3220 } else if (((instr->Opc2Value() == 0x6)) && (instr->Opc3Value() == 0x3)) {
3221 // vrintz - truncate 3221 // vrintz - truncate
3222 if (instr->SzValue() == 0x1) { 3222 if (instr->SzValue() == 0x1) {
3223 double dm_value = get_double_from_d_register(vm); 3223 double dm_value = get_double_from_d_register(vm);
3224 double dd_value = trunc(dm_value); 3224 double dd_value = trunc(dm_value);
3225 dd_value = canonicalizeNaN(dd_value); 3225 dd_value = canonicalizeNaN(dd_value);
3226 set_d_register_from_double(vd, dd_value); 3226 set_d_register_from_double(vd, dd_value);
3227 } else { 3227 } else {
3228 float sm_value = get_float_from_s_register(m); 3228 float sm_value = get_float_from_s_register(m);
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4226 set_register(sp, current_sp + sizeof(uintptr_t)); 4226 set_register(sp, current_sp + sizeof(uintptr_t));
4227 return address; 4227 return address;
4228 } 4228 }
4229 4229
4230 } // namespace internal 4230 } // namespace internal
4231 } // namespace v8 4231 } // namespace v8
4232 4232
4233 #endif // USE_SIMULATOR 4233 #endif // USE_SIMULATOR
4234 4234
4235 #endif // V8_TARGET_ARCH_ARM 4235 #endif // V8_TARGET_ARCH_ARM
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