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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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22 V(IA32Imul) \ | 22 V(IA32Imul) \ |
23 V(IA32ImulHigh) \ | 23 V(IA32ImulHigh) \ |
24 V(IA32UmulHigh) \ | 24 V(IA32UmulHigh) \ |
25 V(IA32Idiv) \ | 25 V(IA32Idiv) \ |
26 V(IA32Udiv) \ | 26 V(IA32Udiv) \ |
27 V(IA32Not) \ | 27 V(IA32Not) \ |
28 V(IA32Neg) \ | 28 V(IA32Neg) \ |
29 V(IA32Shl) \ | 29 V(IA32Shl) \ |
30 V(IA32Shr) \ | 30 V(IA32Shr) \ |
31 V(IA32Sar) \ | 31 V(IA32Sar) \ |
| 32 V(IA32Shl64) \ |
32 V(IA32Ror) \ | 33 V(IA32Ror) \ |
33 V(IA32Lzcnt) \ | 34 V(IA32Lzcnt) \ |
34 V(IA32Tzcnt) \ | 35 V(IA32Tzcnt) \ |
35 V(IA32Popcnt) \ | 36 V(IA32Popcnt) \ |
36 V(SSEFloat32Cmp) \ | 37 V(SSEFloat32Cmp) \ |
37 V(SSEFloat32Add) \ | 38 V(SSEFloat32Add) \ |
38 V(SSEFloat32Sub) \ | 39 V(SSEFloat32Sub) \ |
39 V(SSEFloat32Mul) \ | 40 V(SSEFloat32Mul) \ |
40 V(SSEFloat32Div) \ | 41 V(SSEFloat32Div) \ |
41 V(SSEFloat32Max) \ | 42 V(SSEFloat32Max) \ |
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98 V(IA32Movsd) \ | 99 V(IA32Movsd) \ |
99 V(IA32BitcastFI) \ | 100 V(IA32BitcastFI) \ |
100 V(IA32BitcastIF) \ | 101 V(IA32BitcastIF) \ |
101 V(IA32Lea) \ | 102 V(IA32Lea) \ |
102 V(IA32Push) \ | 103 V(IA32Push) \ |
103 V(IA32PushFloat32) \ | 104 V(IA32PushFloat32) \ |
104 V(IA32PushFloat64) \ | 105 V(IA32PushFloat64) \ |
105 V(IA32Poke) \ | 106 V(IA32Poke) \ |
106 V(IA32StackCheck) | 107 V(IA32StackCheck) |
107 | 108 |
108 | |
109 // Addressing modes represent the "shape" of inputs to an instruction. | 109 // Addressing modes represent the "shape" of inputs to an instruction. |
110 // Many instructions support multiple addressing modes. Addressing modes | 110 // Many instructions support multiple addressing modes. Addressing modes |
111 // are encoded into the InstructionCode of the instruction and tell the | 111 // are encoded into the InstructionCode of the instruction and tell the |
112 // code generator after register allocation which assembler method to call. | 112 // code generator after register allocation which assembler method to call. |
113 // | 113 // |
114 // We use the following local notation for addressing modes: | 114 // We use the following local notation for addressing modes: |
115 // | 115 // |
116 // M = memory operand | 116 // M = memory operand |
117 // R = base register | 117 // R = base register |
118 // N = index register * N for N in {1, 2, 4, 8} | 118 // N = index register * N for N in {1, 2, 4, 8} |
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137 V(M2I) /* [ %r2*2 + K] */ \ | 137 V(M2I) /* [ %r2*2 + K] */ \ |
138 V(M4I) /* [ %r2*4 + K] */ \ | 138 V(M4I) /* [ %r2*4 + K] */ \ |
139 V(M8I) /* [ %r2*8 + K] */ \ | 139 V(M8I) /* [ %r2*8 + K] */ \ |
140 V(MI) /* [ K] */ | 140 V(MI) /* [ K] */ |
141 | 141 |
142 } // namespace compiler | 142 } // namespace compiler |
143 } // namespace internal | 143 } // namespace internal |
144 } // namespace v8 | 144 } // namespace v8 |
145 | 145 |
146 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 146 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
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