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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/code_generator.h" | 9 #include "vm/code_generator.h" |
10 #include "vm/compiler.h" | 10 #include "vm/compiler.h" |
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1055 __ sw(T3, Address(SP, 2 * kWordSize)); | 1055 __ sw(T3, Address(SP, 2 * kWordSize)); |
1056 __ sw(T2, Address(SP, 1 * kWordSize)); | 1056 __ sw(T2, Address(SP, 1 * kWordSize)); |
1057 __ sw(T1, Address(SP, 0 * kWordSize)); | 1057 __ sw(T1, Address(SP, 0 * kWordSize)); |
1058 | 1058 |
1059 Label add_to_buffer; | 1059 Label add_to_buffer; |
1060 // Check whether this object has already been remembered. Skip adding to the | 1060 // Check whether this object has already been remembered. Skip adding to the |
1061 // store buffer if the object is in the store buffer already. | 1061 // store buffer if the object is in the store buffer already. |
1062 // Spilled: T1, T2, T3. | 1062 // Spilled: T1, T2, T3. |
1063 // T0: Address being stored. | 1063 // T0: Address being stored. |
1064 __ lw(T2, FieldAddress(T0, Object::tags_offset())); | 1064 __ lw(T2, FieldAddress(T0, Object::tags_offset())); |
1065 __ andi(T1, T2, Immediate(1 << RawObject::kRememberedBit)); | 1065 __ andi(CMPRES, T2, Immediate(1 << RawObject::kRememberedBit)); |
1066 __ beq(T1, ZR, &add_to_buffer); | 1066 __ beq(CMPRES, ZR, &add_to_buffer); |
1067 __ lw(T1, Address(SP, 0 * kWordSize)); | 1067 __ lw(T1, Address(SP, 0 * kWordSize)); |
1068 __ lw(T2, Address(SP, 1 * kWordSize)); | 1068 __ lw(T2, Address(SP, 1 * kWordSize)); |
1069 __ lw(T3, Address(SP, 2 * kWordSize)); | 1069 __ lw(T3, Address(SP, 2 * kWordSize)); |
1070 __ addiu(SP, SP, Immediate(3 * kWordSize)); | 1070 __ addiu(SP, SP, Immediate(3 * kWordSize)); |
1071 __ Ret(); | 1071 __ Ret(); |
1072 | 1072 |
1073 __ Bind(&add_to_buffer); | 1073 __ Bind(&add_to_buffer); |
1074 __ ori(T2, T2, Immediate(1 << RawObject::kRememberedBit)); | 1074 __ ori(T2, T2, Immediate(1 << RawObject::kRememberedBit)); |
1075 __ sw(T2, FieldAddress(T0, Object::tags_offset())); | 1075 __ sw(T2, FieldAddress(T0, Object::tags_offset())); |
1076 | 1076 |
1077 // Load the isolate out of the context. | 1077 // Load the isolate out of the context. |
1078 // Spilled: T1, T2, T3. | 1078 // Spilled: T1, T2, T3. |
1079 // T0: Address being stored. | 1079 // T0: Address being stored. |
1080 __ lw(T1, FieldAddress(CTX, Context::isolate_offset())); | 1080 __ lw(T1, FieldAddress(CTX, Context::isolate_offset())); |
1081 | 1081 |
1082 // Load the StoreBuffer block out of the isolate. Then load top_ out of the | 1082 // Load the StoreBuffer block out of the isolate. Then load top_ out of the |
1083 // StoreBufferBlock and add the address to the pointers_. | 1083 // StoreBufferBlock and add the address to the pointers_. |
1084 // T1: Isolate. | 1084 // T1: Isolate. |
1085 __ lw(T1, Address(T1, Isolate::store_buffer_offset())); | 1085 __ lw(T1, Address(T1, Isolate::store_buffer_offset())); |
1086 __ lw(T2, Address(T1, StoreBufferBlock::top_offset())); | 1086 __ lw(T2, Address(T1, StoreBufferBlock::top_offset())); |
1087 __ sll(T3, T2, 2); | 1087 __ sll(T3, T2, 2); |
1088 __ addu(T3, T1, T3); | 1088 __ addu(T3, T1, T3); |
1089 __ sw(T0, Address(T3, StoreBufferBlock::pointers_offset())); | 1089 __ sw(T0, Address(T3, StoreBufferBlock::pointers_offset())); |
1090 | 1090 |
1091 // Increment top_ and check for overflow. | 1091 // Increment top_ and check for overflow. |
1092 // T2: top_ | 1092 // T2: top_ |
1093 // T1: StoreBufferBlock | 1093 // T1: StoreBufferBlock |
1094 Label L; | 1094 Label L; |
1095 __ AddImmediate(T2, 1); | 1095 __ addiu(T2, T2, Immediate(1)); |
1096 __ sw(T2, Address(T1, StoreBufferBlock::top_offset())); | 1096 __ sw(T2, Address(T1, StoreBufferBlock::top_offset())); |
1097 __ addiu(CMPRES, T2, Immediate(-StoreBufferBlock::kSize)); | 1097 __ addiu(CMPRES, T2, Immediate(-StoreBufferBlock::kSize)); |
1098 // Restore values. | 1098 // Restore values. |
1099 __ lw(T1, Address(SP, 0 * kWordSize)); | 1099 __ lw(T1, Address(SP, 0 * kWordSize)); |
1100 __ lw(T2, Address(SP, 1 * kWordSize)); | 1100 __ lw(T2, Address(SP, 1 * kWordSize)); |
1101 __ lw(T3, Address(SP, 2 * kWordSize)); | 1101 __ lw(T3, Address(SP, 2 * kWordSize)); |
1102 __ beq(CMPRES, ZR, &L); | 1102 __ beq(CMPRES, ZR, &L); |
1103 __ delay_slot()->addiu(SP, SP, Immediate(3 * kWordSize)); | 1103 __ delay_slot()->addiu(SP, SP, Immediate(3 * kWordSize)); |
1104 __ Ret(); | 1104 __ Ret(); |
1105 | 1105 |
1106 // Handle overflow: Call the runtime leaf function. | 1106 // Handle overflow: Call the runtime leaf function. |
1107 __ Bind(&L); | 1107 __ Bind(&L); |
1108 // Setup frame, push callee-saved registers. | 1108 // Setup frame, push callee-saved registers. |
1109 | 1109 |
1110 __ EnterCallRuntimeFrame(0 * kWordSize); | 1110 __ EnterCallRuntimeFrame(1 * kWordSize); |
1111 __ lw(A0, FieldAddress(CTX, Context::isolate_offset())); | 1111 __ lw(A0, FieldAddress(CTX, Context::isolate_offset())); |
1112 __ CallRuntime(kStoreBufferBlockProcessRuntimeEntry); | 1112 __ CallRuntime(kStoreBufferBlockProcessRuntimeEntry); |
1113 __ TraceSimMsg("UpdateStoreBufferStub return"); | 1113 __ TraceSimMsg("UpdateStoreBufferStub return"); |
1114 // Restore callee-saved registers, tear down frame. | 1114 // Restore callee-saved registers, tear down frame. |
1115 __ LeaveCallRuntimeFrame(); | 1115 __ LeaveCallRuntimeFrame(); |
1116 __ Ret(); | 1116 __ Ret(); |
1117 } | 1117 } |
1118 | 1118 |
1119 | 1119 |
1120 // Called for inline allocation of objects. | 1120 // Called for inline allocation of objects. |
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2245 __ lw(left, Address(SP, 1 * kWordSize)); | 2245 __ lw(left, Address(SP, 1 * kWordSize)); |
2246 __ lw(temp2, Address(SP, 2 * kWordSize)); | 2246 __ lw(temp2, Address(SP, 2 * kWordSize)); |
2247 __ lw(temp1, Address(SP, 3 * kWordSize)); | 2247 __ lw(temp1, Address(SP, 3 * kWordSize)); |
2248 __ Ret(); | 2248 __ Ret(); |
2249 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize)); | 2249 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize)); |
2250 } | 2250 } |
2251 | 2251 |
2252 } // namespace dart | 2252 } // namespace dart |
2253 | 2253 |
2254 #endif // defined TARGET_ARCH_MIPS | 2254 #endif // defined TARGET_ARCH_MIPS |
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