Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(21)

Side by Side Diff: runtime/vm/simulator_mips.cc

Issue 17502002: Enables more tests for SIMMIPS. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « runtime/vm/simulator_mips.h ('k') | runtime/vm/stub_code_mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <math.h> // for isnan. 5 #include <math.h> // for isnan.
6 #include <setjmp.h> 6 #include <setjmp.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 8
9 #include "vm/globals.h" 9 #include "vm/globals.h"
10 #if defined(TARGET_ARCH_MIPS) 10 #if defined(TARGET_ARCH_MIPS)
(...skipping 1390 matching lines...) Expand 10 before | Expand all | Expand 10 after
1401 set_lo_register(Utils::Low32Bits(res)); 1401 set_lo_register(Utils::Low32Bits(res));
1402 break; 1402 break;
1403 } 1403 }
1404 case MADDU: { 1404 case MADDU: {
1405 ASSERT(instr->RdField() == 0); 1405 ASSERT(instr->RdField() == 0);
1406 ASSERT(instr->SaField() == 0); 1406 ASSERT(instr->SaField() == 0);
1407 // Format(instr, "maddu 'rs, 'rt"); 1407 // Format(instr, "maddu 'rs, 'rt");
1408 uint32_t lo = get_lo_register(); 1408 uint32_t lo = get_lo_register();
1409 uint32_t hi = get_hi_register(); 1409 uint32_t hi = get_hi_register();
1410 uint64_t accum = Utils::LowHighTo64Bits(lo, hi); 1410 uint64_t accum = Utils::LowHighTo64Bits(lo, hi);
1411 uint64_t rs = static_cast<int64_t>(get_register(instr->RsField())); 1411 uint64_t rs = static_cast<uint64_t>(get_register(instr->RsField()));
1412 uint64_t rt = static_cast<int64_t>(get_register(instr->RtField())); 1412 uint64_t rt = static_cast<uint64_t>(get_register(instr->RtField()));
1413 uint64_t res = accum + rs * rt; 1413 uint64_t res = accum + rs * rt;
1414 set_hi_register(Utils::High32Bits(res)); 1414 set_hi_register(Utils::High32Bits(res));
1415 set_lo_register(Utils::Low32Bits(res)); 1415 set_lo_register(Utils::Low32Bits(res));
1416 break; 1416 break;
1417 } 1417 }
1418 case CLO: { 1418 case CLO: {
1419 ASSERT(instr->SaField() == 0); 1419 ASSERT(instr->SaField() == 0);
1420 ASSERT(instr->RtField() == instr->RdField()); 1420 ASSERT(instr->RtField() == instr->RdField());
1421 // Format(instr, "clo 'rd, 'rs"); 1421 // Format(instr, "clo 'rd, 'rs");
1422 int32_t rs_val = get_register(instr->RsField()); 1422 int32_t rs_val = get_register(instr->RsField());
(...skipping 232 matching lines...) Expand 10 before | Expand all | Expand 10 after
1655 break; 1655 break;
1656 } 1656 }
1657 default: { 1657 default: {
1658 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits()); 1658 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits());
1659 UnimplementedInstruction(instr); 1659 UnimplementedInstruction(instr);
1660 break; 1660 break;
1661 } 1661 }
1662 } 1662 }
1663 break; 1663 break;
1664 } 1664 }
1665 case COP1_CVT_S: {
1666 switch (instr->FormatField()) {
1667 case FMT_D: {
1668 double fs_dbl = get_fregister_double(instr->FsField());
1669 float fs_flt = static_cast<float>(fs_dbl);
1670 set_fregister_float(instr->FdField(), fs_flt);
1671 break;
1672 }
1673 default: {
1674 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits());
1675 UnimplementedInstruction(instr);
1676 break;
1677 }
1678 }
1679 break;
1680 }
1665 default: { 1681 default: {
1666 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits()); 1682 OS::PrintErr("DecodeCop1: 0x%x\n", instr->InstructionBits());
1667 UnimplementedInstruction(instr); 1683 UnimplementedInstruction(instr);
1668 break; 1684 break;
1669 } 1685 }
1670 } 1686 }
1671 } else { 1687 } else {
1672 // If the rs field isn't a valid format, then it must be a sub-op. 1688 // If the rs field isn't a valid format, then it must be a sub-op.
1673 switch (instr->Cop1SubField()) { 1689 switch (instr->Cop1SubField()) {
1674 case COP1_MF: { 1690 case COP1_MF: {
(...skipping 372 matching lines...) Expand 10 before | Expand all | Expand 10 after
2047 } 2063 }
2048 } 2064 }
2049 } 2065 }
2050 2066
2051 2067
2052 int64_t Simulator::Call(int32_t entry, 2068 int64_t Simulator::Call(int32_t entry,
2053 int32_t parameter0, 2069 int32_t parameter0,
2054 int32_t parameter1, 2070 int32_t parameter1,
2055 int32_t parameter2, 2071 int32_t parameter2,
2056 int32_t parameter3, 2072 int32_t parameter3,
2057 bool fp_return) { 2073 bool fp_return,
2074 bool fp_args) {
2058 // Save the SP register before the call so we can restore it. 2075 // Save the SP register before the call so we can restore it.
2059 int32_t sp_before_call = get_register(SP); 2076 int32_t sp_before_call = get_register(SP);
2060 2077
2061 // Setup parameters. 2078 // Setup parameters.
2062 set_register(A0, parameter0); 2079 if (fp_args) {
2063 set_register(A1, parameter1); 2080 set_fregister(F0, parameter0);
2064 set_register(A2, parameter2); 2081 set_fregister(F1, parameter1);
2065 set_register(A3, parameter3); 2082 set_fregister(F2, parameter2);
2083 set_fregister(F3, parameter3);
2084 } else {
2085 set_register(A0, parameter0);
2086 set_register(A1, parameter1);
2087 set_register(A2, parameter2);
2088 set_register(A3, parameter3);
2089 }
2066 2090
2067 // Make sure the activation frames are properly aligned. 2091 // Make sure the activation frames are properly aligned.
2068 int32_t stack_pointer = sp_before_call; 2092 int32_t stack_pointer = sp_before_call;
2069 static const int kFrameAlignment = OS::ActivationFrameAlignment(); 2093 static const int kFrameAlignment = OS::ActivationFrameAlignment();
2070 if (kFrameAlignment > 0) { 2094 if (kFrameAlignment > 0) {
2071 stack_pointer = Utils::RoundDown(stack_pointer, kFrameAlignment); 2095 stack_pointer = Utils::RoundDown(stack_pointer, kFrameAlignment);
2072 } 2096 }
2073 set_register(SP, stack_pointer); 2097 set_register(SP, stack_pointer);
2074 2098
2075 // Prepare to execute the code at entry. 2099 // Prepare to execute the code at entry.
(...skipping 123 matching lines...) Expand 10 before | Expand all | Expand 10 after
2199 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); 2223 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
2200 } 2224 }
2201 buf->Longjmp(); 2225 buf->Longjmp();
2202 } 2226 }
2203 2227
2204 } // namespace dart 2228 } // namespace dart
2205 2229
2206 #endif // !defined(HOST_ARCH_MIPS) 2230 #endif // !defined(HOST_ARCH_MIPS)
2207 2231
2208 #endif // defined TARGET_ARCH_MIPS 2232 #endif // defined TARGET_ARCH_MIPS
OLDNEW
« no previous file with comments | « runtime/vm/simulator_mips.h ('k') | runtime/vm/stub_code_mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698