Enables more tests for SIMMIPS.

runtime/vm/intrinsifier_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intrinsifier.h"
 
 #include "vm/assembler.h"
@@ skipping 186 matching lines @@
   if (FLAG_enable_type_checks) {
     const intptr_t type_args_field_offset =
         ComputeObjectArrayTypeArgumentsOffset();
     // Inline simple tests (Smi, null), fallthrough if not positive.
     Label checked_ok;
     __ lw(T2, Address(SP, 0 * kWordSize));  // Value.
 
     // Null value is valid for any type.
     __ LoadImmediate(T7, reinterpret_cast<int32_t>(Object::null()));
     __ beq(T2, T7, &checked_ok);
-    __ delay_slot()->lw(T1, Address(SP, 2 * kWordSize));  // Array.
 
+    __ lw(T1, Address(SP, 2 * kWordSize));  // Array.
     __ lw(T1, FieldAddress(T1, type_args_field_offset));
 
     // T1: Type arguments of array.
     __ beq(T1, T7, &checked_ok);
 
     // Check if it's dynamic.
     // For now handle only TypeArguments and bail out if InstantiatedTypeArgs.
     __ LoadClassId(TMP, T1);
     __ BranchNotEqual(TMP, kTypeArgumentsCid, &fall_through);
 
     // Get type at index 0.
     __ lw(T0, FieldAddress(T1, TypeArguments::type_at_offset(0)));
     __ BranchEqual(T0, Type::ZoneHandle(Type::DynamicType()), &checked_ok);
 
     // Check for int and num.
     __ andi(CMPRES, T2, Immediate(kSmiTagMask));
     __ bne(CMPRES, ZR, &fall_through);  // Non-smi value.
 
     __ BranchEqual(T0, Type::ZoneHandle(Type::IntType()), &checked_ok);
     __ BranchNotEqual(T0, Type::ZoneHandle(Type::Number()), &fall_through);
     __ Bind(&checked_ok);
   }
   __ lw(T1, Address(SP, 1 * kWordSize));  // Index.
   __ andi(CMPRES, T1, Immediate(kSmiTagMask));
   // Index not Smi.
   __ bne(CMPRES, ZR, &fall_through);
-  __ delay_slot()->lw(T0, Address(SP, 2 * kWordSize));  // Array.
 
+  __ lw(T0, Address(SP, 2 * kWordSize));  // Array.
   // Range check.
   __ lw(T3, FieldAddress(T0, Array::length_offset()));  // Array length.
   // Runtime throws exception.
   __ BranchUnsignedGreaterEqual(T1, T3, &fall_through);
 
   // Note that T1 is Smi, i.e, times 2.
   ASSERT(kSmiTagShift == 1);
   // Destroy T2 as we will not continue in the function.
   __ lw(T2, Address(SP, 0 * kWordSize));  // Value.
   __ sll(T1, T1, 1);  // T1 is Smi.
   __ addu(T1, T0, T1);
   __ StoreIntoObject(T0,
                      FieldAddress(T1, Array::data_offset()),
                      T2);
-  // Caller is responsible of preserving the value if necessary.
+  // Caller is responsible for preserving the value if necessary.
   __ Ret();
   __ Bind(&fall_through);
   return false;
 }
 
 
 // Allocate a GrowableObjectArray using the backing array specified.
 // On stack: type argument (+1), data (+0).
 bool Intrinsifier::GrowableArray_Allocate(Assembler* assembler) {
   // The newly allocated object is returned in V0.
@@ skipping 1069 matching lines @@
   __ Bind(&is_true);
   __ LoadObject(V0, Bool::True());
   __ Ret();
   return true;
 }
 
 
 bool Intrinsifier::Double_getIsNegative(Assembler* assembler) {
   Label is_false, is_true, is_zero;
   __ lw(T0, Address(SP, 0 * kWordSize));
-  __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
-  __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
+  __ LoadDFromOffset(D0, T0, Double::value_offset() - kHeapObjectTag);
 
   __ cund(D0, D0);
   __ bc1t(&is_false);  // NaN -> false.
 
+  __ LoadImmediate(D1, 0.0);
   __ ceqd(D0, D1);
   __ bc1t(&is_zero);  // Check for negative zero.
 
-  __ LoadImmediate(D1, 0.0);
   __ coled(D1, D0);
   __ bc1t(&is_false);  // >= 0 -> false.
 
   __ Bind(&is_true);
   __ LoadObject(V0, Bool::True());
   __ Ret();
 
   __ Bind(&is_false);
   __ LoadObject(V0, Bool::False());
   __ Ret();
@@ skipping 80 matching lines @@
   const Instance& a_value = Instance::Handle(random_A_field.value());
   const int64_t a_int_value = Integer::Cast(a_value).AsInt64Value();
   // 'a_int_value' is a mask.
   ASSERT(Utils::IsUint(32, a_int_value));
   int32_t a_int32_value = static_cast<int32_t>(a_int_value);
 
   __ lw(T0, Address(SP, 0 * kWordSize));  // Receiver.
   __ lw(T1, FieldAddress(T0, state_field.Offset()));  // Field '_state'.
 
   // Addresses of _state[0] and _state[1].
-  const int64_t disp_0 =
-      FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid);
+  const Address& addr_0 = FieldAddress(T1,
+      FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid));
 
-  const int64_t disp_1 =
+  const Address& addr_1 = FieldAddress(T1,
       FlowGraphCompiler::ElementSizeFor(kTypedDataUint32ArrayCid) +
-      FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid);
+      FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid));
+
   __ LoadImmediate(T0, a_int32_value);
-  __ lw(T2, FieldAddress(T1, disp_0));
-  __ lw(T3, FieldAddress(T1, disp_1));
+  __ lw(T2, addr_0);
+  __ lw(T3, addr_1);
   __ sra(T6, T3, 31);  // Sign extend T3 into T6.
   __ mtlo(T3);
   __ mthi(T6);  // HI:LO <- T6:T3
   // 64-bit multiply and accumulate into T6:T3.
-  __ madd(T0, T2);  // HI:LO <- HI:LO + T0 * T3.
+  __ madd(T0, T2);  // HI:LO <- HI:LO + T0 * T2.
   __ mflo(T3);
   __ mfhi(T6);
-  __ sw(T3, FieldAddress(T1, disp_0));
-  __ sw(T6, FieldAddress(T1, disp_1));
+  __ sw(T3, addr_0);
+  __ sw(T6, addr_1);
   __ Ret();
   return true;
 }
 
 
 bool Intrinsifier::Object_equal(Assembler* assembler) {
   Label is_true;
 
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ lw(T1, Address(SP, 1 * kWordSize));
@@ skipping 288 matching lines @@
   __ Bind(&ok);
   __ Ret();
 
   __ Bind(&fall_through);
   return false;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS