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Issue 1749263002: MIPS: Improve Lsa/Dlsa implementations. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebased. Created 4 years, 9 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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309 if ((masm->pc_offset() & 7) == 0) { 309 if ((masm->pc_offset() & 7) == 0) {
310 __ nop(); 310 __ nop();
311 } 311 }
312 312
313 { 313 {
314 __ BlockTrampolinePoolFor(kNumCases * 2 + 6 + 1); 314 __ BlockTrampolinePoolFor(kNumCases * 2 + 6 + 1);
315 PredictableCodeSizeScope predictable( 315 PredictableCodeSizeScope predictable(
316 masm, kNumCases * kPointerSize + ((6 + 1) * Assembler::kInstrSize)); 316 masm, kNumCases * kPointerSize + ((6 + 1) * Assembler::kInstrSize));
317 317
318 __ addiupc(at, 6 + 1); 318 __ addiupc(at, 6 + 1);
319 __ dlsa(at, at, a0, 3); 319 __ Dlsa(at, at, a0, 3);
320 __ ld(at, MemOperand(at)); 320 __ ld(at, MemOperand(at));
321 __ jalr(at); 321 __ jalr(at);
322 __ nop(); // Branch delay slot nop. 322 __ nop(); // Branch delay slot nop.
323 __ bc(&done); 323 __ bc(&done);
324 // A nop instruction must be generated by the forbidden slot guard 324 // A nop instruction must be generated by the forbidden slot guard
325 // (Assembler::dd(Label*)) so the first label goes to an 8 bytes aligned 325 // (Assembler::dd(Label*)) so the first label goes to an 8 bytes aligned
326 // location. 326 // location.
327 for (int i = 0; i < kNumCases; ++i) { 327 for (int i = 0; i < kNumCases; ++i) {
328 __ dd(&labels[i]); 328 __ dd(&labels[i]);
329 } 329 }
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669 __ mtc1(a0, f4); 669 __ mtc1(a0, f4);
670 __ cvt_d_w(f0, f4); 670 __ cvt_d_w(f0, f4);
671 __ Trunc_w_d(f2, f0); 671 __ Trunc_w_d(f2, f0);
672 __ mfc1(v1, f2); 672 __ mfc1(v1, f2);
673 __ dmtc1(v1, f2); 673 __ dmtc1(v1, f2);
674 })); 674 }));
675 } 675 }
676 } 676 }
677 677
678 #undef __ 678 #undef __
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