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| 1 | 1 |
| 2 // Copyright 2012 the V8 project authors. All rights reserved. | 2 // Copyright 2012 the V8 project authors. All rights reserved. |
| 3 // Use of this source code is governed by a BSD-style license that can be | 3 // Use of this source code is governed by a BSD-style license that can be |
| 4 // found in the LICENSE file. | 4 // found in the LICENSE file. |
| 5 | 5 |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_MIPS | 8 #if V8_TARGET_ARCH_MIPS |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
| (...skipping 1130 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1141 if (IsMipsArchVariant(kLoongson)) { | 1141 if (IsMipsArchVariant(kLoongson)) { |
| 1142 lw(zero_reg, rs); | 1142 lw(zero_reg, rs); |
| 1143 } else { | 1143 } else { |
| 1144 pref(hint, rs); | 1144 pref(hint, rs); |
| 1145 } | 1145 } |
| 1146 } | 1146 } |
| 1147 | 1147 |
| 1148 | 1148 |
| 1149 void MacroAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa, | 1149 void MacroAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa, |
| 1150 Register scratch) { | 1150 Register scratch) { |
| 1151 DCHECK(sa >= 1 && sa <= 31); |
| 1151 if (IsMipsArchVariant(kMips32r6) && sa <= 4) { | 1152 if (IsMipsArchVariant(kMips32r6) && sa <= 4) { |
| 1152 lsa(rd, rt, rs, sa); | 1153 lsa(rd, rt, rs, sa - 1); |
| 1153 } else { | 1154 } else { |
| 1154 Register tmp = rd.is(rt) ? scratch : rd; | 1155 Register tmp = rd.is(rt) ? scratch : rd; |
| 1155 DCHECK(!tmp.is(rt)); | 1156 DCHECK(!tmp.is(rt)); |
| 1156 sll(tmp, rs, sa); | 1157 sll(tmp, rs, sa); |
| 1157 Addu(rd, rt, tmp); | 1158 Addu(rd, rt, tmp); |
| 1158 } | 1159 } |
| 1159 } | 1160 } |
| 1160 | 1161 |
| 1161 | 1162 |
| 1162 // ------------Pseudo-instructions------------- | 1163 // ------------Pseudo-instructions------------- |
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| 6020 if (mag.shift > 0) sra(result, result, mag.shift); | 6021 if (mag.shift > 0) sra(result, result, mag.shift); |
| 6021 srl(at, dividend, 31); | 6022 srl(at, dividend, 31); |
| 6022 Addu(result, result, Operand(at)); | 6023 Addu(result, result, Operand(at)); |
| 6023 } | 6024 } |
| 6024 | 6025 |
| 6025 | 6026 |
| 6026 } // namespace internal | 6027 } // namespace internal |
| 6027 } // namespace v8 | 6028 } // namespace v8 |
| 6028 | 6029 |
| 6029 #endif // V8_TARGET_ARCH_MIPS | 6030 #endif // V8_TARGET_ARCH_MIPS |
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