Subzero. ARM32. Reverts cl 1687553002.

tests_lit/assembler/arm32/rem-vec.ll

Index: tests_lit/assembler/arm32/rem-vec.ll
diff --git a/tests_lit/assembler/arm32/rem-vec.ll b/tests_lit/assembler/arm32/rem-vec.ll
index 0fd4be406223f201e729045c0e111abbac9107fc..00190cfbe41c06ba7a0bcf11e4cb59db46304f59 100644
--- a/tests_lit/assembler/arm32/rem-vec.ll
+++ b/tests_lit/assembler/arm32/rem-vec.ll
@@ -17,24 +17,24 @@ entry:
   %v = urem <4 x i32> %a, %b
 
 ; ASM-LABEL:.LUrem4i32$local$__0:
-; ASM-NEXT:	udiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d4[0], r2
+; ASM-NEXT: udiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d4[0], r2
 
 ; ASM-LABEL:.LUrem4i32$local$__1:
-; ASM-NEXT:	udiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d4[1], r2
+; ASM-NEXT: udiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d4[1], r2
 
 ; ASM-LABEL:.LUrem4i32$local$__2:
-; ASM-NEXT:	udiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d5[0], r2
+; ASM-NEXT: udiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d5[0], r2
 
 ; ASM-LABEL:.LUrem4i32$local$__3:
-; ASM-NEXT:	udiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d5[1], r2
+; ASM-NEXT: udiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d5[1], r2
 
   ret <4 x i32> %v
 }
@@ -48,24 +48,24 @@ entry:
   %v = srem <4 x i32> %a, %b
 
 ; ASM-LABEL:.LSrem4i32$local$__0:
-; ASM-NEXT:	sdiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d4[0], r2
+; ASM-NEXT: sdiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d4[0], r2
 
 ; ASM-LABEL:.LSrem4i32$local$__1:
-; ASM-NEXT:	sdiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d4[1], r2
+; ASM-NEXT: sdiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d4[1], r2
 
 ; ASM-LABEL:.LSrem4i32$local$__2:
-; ASM-NEXT:	sdiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d5[0], r2
+; ASM-NEXT: sdiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d5[0], r2
 
 ; ASM-LABEL:.LSrem4i32$local$__3:
-; ASM-NEXT:	sdiv	r2, r0, r1
-; ASM-NEXT:	mls	r2, r2, r1, r0
-; ASM-NEXT:	vmov.32	d5[1], r2
+; ASM-NEXT: sdiv r2, r0, r1
+; ASM-NEXT: mls r2, r2, r1, r0
+; ASM-NEXT: vmov.32 d5[1], r2
 
   ret <4 x i32> %v
 }
@@ -78,29 +78,21 @@ entry:
 
   %v = frem <4 x float> %a, %b
 
-; ASM:	       	vmov.f32	s0, s16
-; ASM-NEXT:	vmov.f32	s1, s20
-; ASM-NEXT:	movw	r0, #:lower16:fmodf
-; ASM-NEXT:	movt	r0, #:upper16:fmodf
-; ASM-NEXT:	blx	r0
-
-; ASM:		vmov.f32	s0, s17
-; ASM-NEXT:	vmov.f32	s1, s21
-; ASM-NEXT:	movw	r0, #:lower16:fmodf
-; ASM-NEXT:	movt	r0, #:upper16:fmodf
-; ASM-NEXT:	blx	r0
-
-; ASM:		vmov.f32	s0, s18
-; ASM-NEXT:	vmov.f32	s1, s22
-; ASM-NEXT:	movw	r0, #:lower16:fmodf
-; ASM-NEXT:	movt	r0, #:upper16:fmodf
-; ASM-NEXT:	blx	r0
-
-; ASM:		vmov.f32	s16, s19
-; ASM-NEXT:	vmov.f32	s20, s23
-; ASM-NEXT:	movw	r0, #:lower16:fmodf
-; ASM-NEXT:	movt	r0, #:upper16:fmodf
-; ASM:	blx	r0
+; ASM:         vmov.f32 s0, s16
+; ASM-NEXT: vmov.f32 s1, s20
+; ASM-NEXT: bl fmodf
+
+; ASM:  vmov.f32 s0, s17
+; ASM-NEXT: vmov.f32 s1, s21
+; ASM-NEXT: bl fmodf
+
+; ASM:  vmov.f32 s0, s18
+; ASM-NEXT: vmov.f32 s1, s22
+; ASM-NEXT: bl fmodf
+
+; ASM:  vmov.f32 s16, s19
+; ASM-NEXT: vmov.f32 s20, s23
+; ASM: bl fmodf
 
   ret <4 x float> %v
 }