Subzero. ARM32. Reverts cl 1687553002.

tests_lit/llvm2ice_tests/nonsfi.ll

 ; RUN: %p2i -i %s --target=x8632 --filetype=obj --assemble --disassemble \
 ; RUN:   --args -O2 -nonsfi=1 --ffunction-sections \
 ; RUN:   | FileCheck --check-prefix=NONSFI %s
 ; RUN: %p2i -i %s --target=x8632 --filetype=obj --assemble --disassemble \
 ; RUN:   --args -O2 -nonsfi=0 --ffunction-sections \
 ; RUN:   | FileCheck --check-prefix=DEFAULT %s
 
 ; RUN: %p2i -i %s --target=arm32 --filetype=obj --assemble --disassemble \
 ; RUN:   --args -O2 -nonsfi=1 --ffunction-sections \
 ; RUN:   | FileCheck --check-prefix=ARM32-NONSFI %s
 
 @G1 = internal global [4 x i8] zeroinitializer, align 4
 @G2 = internal global [4 x i8] zeroinitializer, align 4
 
 define internal void @testCallRegular() {
 entry:
   ; Make a call to a *different* function, plus use -ffunction-sections, to
   ; force an appropriately-named relocation.
   call i32 @testLoadBasic()
   ret void
 }
 ; Expect a simple direct call to testCallRegular.
 ; NONSFI-LABEL: testCallRegular
 ; NONSFI: call {{.*}} R_386_PC32 {{.*}}testLoadBasic
 ; DEFAULT-LABEL: testCallRegular
 
 ; ARM32-NONSFI-LABEL: testCallRegular
-; ARM32-NONSFI:      movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC GOTOFF{{.*}}testLoadBasic
-; ARM32-NONSFI-NEXT: movt [[REG:r[0-9]+]], {{.*}} R_ARM_MOVT_PREL GOTOFF{{.*}}testLoadBasic
-; ARM32-NONSFI-NEXT: ldr [[GOTOFF:r[0-9]+]], [pc, [[REG]]]
-; ARM32-NONSFI-NEXT: add [[CT:r[0-9]+]], {{.*}}, [[CT]]
-; ARM32-NONSFI:      blx [[CT]]
+; ARM32-NONSFI: bl {{.*}} R_ARM_CALL {{.*}}testLoadBasic
 
 define internal double @testCallBuiltin(double %val) {
 entry:
   %result = frem double %val, %val
   ret double %result
 }
 ; Expect a simple direct call to fmod.
 ; NONSFI-LABEL: testCallBuiltin
 ; NONSFI: call {{.*}} R_386_PC32 fmod
 ; DEFAULT-LABEL: testCallBuiltin
 
 ; ARM32-NONSFI-LABEL: testCallBuiltin
-; ARM32-NONSFI:      movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC GOTOFF{{.*}}fmod
-; ARM32-NONSFI-NEXT: movt [[REG:r[0-9]+]], {{.*}} R_ARM_MOVT_PREL GOTOFF{{.*}}fmod
-; ARM32-NONSFI-NEXT: ldr [[GOTOFF:r[0-9]+]], [pc, [[REG]]]
-; ARM32-NONSFI-NEXT: add [[CT:r[0-9]+]], {{.*}}, [[CT]]
-; ARM32-NONSFI:      blx [[CT]]
+; ARM32-NONSFI: bl {{.*}} R_ARM_CALL {{.*}}fmod
 
 define internal i32 @testLoadBasic() {
 entry:
   %a = bitcast [4 x i8]* @G1 to i32*
   %b = load i32, i32* %a, align 1
   ret i32 %b
 }
 ; Expect a load with a R_386_GOTOFF relocation.
 ; NONSFI-LABEL: testLoadBasic
 ; NONSFI: mov {{.*}} R_386_GOTOFF {{G1|.bss}}
@@ skipping 94 matching lines @@
   %a = bitcast [4 x i8]* @G1 to i32*
   %b = load i32, i32* %a, align 1
   %c = add i32 %b, 1234
   store i32 %c, i32* %a, align 1
   ret void
 }
 ; Expect an RMW optimization with a R_386_GOTOFF relocation.
 ; NONSFI-LABEL: testRMW
 ; NONSFI: add DWORD PTR {{.*}}+0x0],0x4d2 {{.*}} R_386_GOTOFF {{G1|.bss}}
 ; DEFAULT-LABEL: testRMW