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1 ; Show that we know how to translate push and pop. | 1 ; Show that we know how to translate push and pop. |
2 ; TODO(kschimpf) Translate pop instructions. | 2 ; TODO(kschimpf) Translate pop instructions. |
3 | 3 |
4 ; NOTE: We use -O2 to get rid of memory stores. | 4 ; NOTE: We use -O2 to get rid of memory stores. |
5 | 5 |
6 ; REQUIRES: allow_dump | 6 ; REQUIRES: allow_dump |
7 | 7 |
8 ; Compile using standalone assembler. | 8 ; Compile using standalone assembler. |
9 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 -allow-extern \ | 9 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 -allow-extern \ |
10 ; RUN: -reg-use r0,r1,r2,r3,r4,r5 | FileCheck %s --check-prefix=ASM | 10 ; RUN: | FileCheck %s --check-prefix=ASM |
11 | 11 |
12 ; Show bytes in assembled standalone code. | 12 ; Show bytes in assembled standalone code. |
13 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ | 13 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ |
14 ; RUN: --args -O2 -allow-extern -reg-use r0,r1,r2,r3,r4,r5 \ | 14 ; RUN: --args -O2 -allow-extern | FileCheck %s --check-prefix=DIS |
15 ; RUN: | FileCheck %s --check-prefix=DIS | |
16 | 15 |
17 ; Compile using integrated assembler. | 16 ; Compile using integrated assembler. |
18 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ | 17 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ |
19 ; RUN: -allow-extern -reg-use r0,r1,r2,r3,r4,r5 \ | 18 ; RUN: -allow-extern | FileCheck %s --check-prefix=IASM |
20 ; RUN: | FileCheck %s --check-prefix=IASM | |
21 | 19 |
22 ; Show bytes in assembled integrated code. | 20 ; Show bytes in assembled integrated code. |
23 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ | 21 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ |
24 ; RUN: --args -O2 -allow-extern -reg-use r0,r1,r2,r3,r4,r5 \ | 22 ; RUN: --args -O2 -allow-extern | FileCheck %s --check-prefix=DIS |
25 ; RUN: | FileCheck %s --check-prefix=DIS | |
26 | 23 |
27 declare external void @DoSomething() | 24 declare external void @DoSomething() |
28 | 25 |
29 define internal void @SinglePushPop() { | 26 define internal void @SinglePushPop() { |
30 ; ASM-LABEL:SinglePushPop: | |
31 ; DIS-LABEL:{{.+}} <SinglePushPop>: | |
32 ; IASM-LABEL:SinglePushPop: | |
33 | |
34 ; ASM: push {lr} | |
35 ; DIS: {{.+}} e52de004 | |
36 ; IASM-NOT: push | |
37 | |
38 call void @DoSomething(); | 27 call void @DoSomething(); |
39 ret void | 28 ret void |
| 29 } |
40 | 30 |
41 ; ASM: pop {lr} | 31 ; ASM-LABEL:SinglePushPop: |
42 ; DIS: {{.+}} e49de004 | 32 ; ASM-NEXT:.LSinglePushPop$__0: |
43 ; IASM-NOT: pop | 33 ; ASM-NEXT: push {lr} |
| 34 ; ASM-NEXT: sub sp, sp, #12 |
| 35 ; ASM-NEXT: bl DoSomething |
| 36 ; ASM-NEXT: add sp, sp, #12 |
| 37 ; ASM-NEXT: pop {lr} |
| 38 ; ASM-NEXT: # lr = def.pseudo |
| 39 ; ASM-NEXT: bx lr |
44 | 40 |
45 } | 41 ; DIS-LABEL:00000000 <SinglePushPop>: |
| 42 ; DIS-NEXT: 0: e52de004 |
| 43 ; DIS-NEXT: 4: e24dd00c |
| 44 ; DIS-NEXT: 8: ebfffffe |
| 45 ; DIS-NEXT: c: e28dd00c |
| 46 ; DIS-NEXT: 10: e49de004 |
| 47 ; DIS-NEXT: 14: e12fff1e |
| 48 |
| 49 ; IASM-LABEL:SinglePushPop: |
| 50 ; IASM-NEXT:.LSinglePushPop$__0: |
| 51 ; IASM-NEXT: .byte 0x4 |
| 52 ; IASM-NEXT: .byte 0xe0 |
| 53 ; IASM-NEXT: .byte 0x2d |
| 54 ; IASM-NEXT: .byte 0xe5 |
| 55 |
| 56 ; IASM-NEXT: .byte 0xc |
| 57 ; IASM-NEXT: .byte 0xd0 |
| 58 ; IASM-NEXT: .byte 0x4d |
| 59 ; IASM-NEXT: .byte 0xe2 |
| 60 ; IASM-NEXT: bl DoSomething @ .word ebfffffe |
| 61 ; IASM-NEXT: .byte 0xc |
| 62 ; IASM-NEXT: .byte 0xd0 |
| 63 ; IASM-NEXT: .byte 0x8d |
| 64 ; IASM-NEXT: .byte 0xe2 |
| 65 |
| 66 ; IASM-NEXT: .byte 0x4 |
| 67 ; IASM-NEXT: .byte 0xe0 |
| 68 ; IASM-NEXT: .byte 0x9d |
| 69 ; IASM-NEXT: .byte 0xe4 |
| 70 |
| 71 ; IASM: .byte 0x1e |
| 72 ; IASM-NEXT: .byte 0xff |
| 73 ; IASM-NEXT: .byte 0x2f |
| 74 ; IASM-NEXT: .byte 0xe1 |
46 | 75 |
47 ; This test is based on taking advantage of the over-eager -O2 | 76 ; This test is based on taking advantage of the over-eager -O2 |
48 ; register allocator that puts V1 and V2 into callee-save registers, | 77 ; register allocator that puts V1 and V2 into callee-save registers, |
49 ; since the call instruction kills the scratch registers. This | 78 ; since the call instruction kills the scratch registers. This |
50 ; requires the callee-save registers to be pushed/popped in the | 79 ; requires the callee-save registers to be pushed/popped in the |
51 ; prolog/epilog. | 80 ; prolog/epilog. |
52 define internal i32 @MultPushPop(i32 %v1, i32 %v2) { | 81 define internal i32 @MultPushPop(i32 %v1, i32 %v2) { |
53 ; ASM-LABEL:MultPushPop: | |
54 ; DIS_LABEL: {{.+}} <MultPushPop>: | |
55 ; IASM-LABEL:MultPushPop: | |
56 ; ASM: push {r4, r5, lr} | |
57 ; DIS: {{.+}}: e92d4030 | |
58 | |
59 ; IASM-NOT: push | |
60 | |
61 | |
62 call void @DoSomething(); | 82 call void @DoSomething(); |
63 %v3 = add i32 %v1, %v2 | 83 %v3 = add i32 %v1, %v2 |
64 ret i32 %v3 | 84 ret i32 %v3 |
| 85 } |
65 | 86 |
66 ; ASM: pop {r4, r5, lr} | 87 ; ASM-LABEL:MultPushPop: |
67 ; DIS: {{.+}} e8bd4030 | 88 ; ASM-NEXT:.LMultPushPop$__0: |
68 ; IASM-NOT: pop | 89 ; ASM-NEXT: push {r4, r5, lr} |
| 90 ; ASM-NEXT: sub sp, sp, #4 |
| 91 ; ASM-NEXT: mov r4, r0 |
| 92 ; ASM-NEXT: mov r5, r1 |
| 93 ; ASM-NEXT: bl DoSomething |
| 94 ; ASM-NEXT: add r4, r4, r5 |
| 95 ; ASM-NEXT: mov r0, r4 |
| 96 ; ASM-NEXT: add sp, sp, #4 |
| 97 ; ASM-NEXT: pop {r4, r5, lr} |
| 98 ; ASM-NEXT: # r4 = def.pseudo |
| 99 ; ASM-NEXT: # r5 = def.pseudo |
| 100 ; ASM-NEXT: # lr = def.pseudo |
| 101 ; ASM-NEXT: bx lr |
69 | 102 |
70 } | 103 ; DIS-LABEL:00000020 <MultPushPop>: |
| 104 ; DIS-NEXT: 20: e92d4030 |
| 105 ; DIS-NEXT: 24: e24dd004 |
| 106 ; DIS-NEXT: 28: e1a04000 |
| 107 ; DIS-NEXT: 2c: e1a05001 |
| 108 ; DIS-NEXT: 30: ebfffffe |
| 109 ; DIS-NEXT: 34: e0844005 |
| 110 ; DIS-NEXT: 38: e1a00004 |
| 111 ; DIS-NEXT: 3c: e28dd004 |
| 112 ; DIS-NEXT: 40: e8bd4030 |
| 113 ; DIS-NEXT: 44: e12fff1e |
| 114 |
| 115 ; IASM-LABEL:MultPushPop: |
| 116 ; IASM-NEXT:.LMultPushPop$__0: |
| 117 ; IASM-NEXT: .byte 0x30 |
| 118 ; IASM-NEXT: .byte 0x40 |
| 119 ; IASM-NEXT: .byte 0x2d |
| 120 ; IASM-NEXT: .byte 0xe9 |
| 121 |
| 122 ; IASM-NEXT: .byte 0x4 |
| 123 ; IASM-NEXT: .byte 0xd0 |
| 124 ; IASM-NEXT: .byte 0x4d |
| 125 ; IASM-NEXT: .byte 0xe2 |
| 126 |
| 127 ; IASM-NEXT: .byte 0x0 |
| 128 ; IASM-NEXT: .byte 0x40 |
| 129 ; IASM-NEXT: .byte 0xa0 |
| 130 ; IASM-NEXT: .byte 0xe1 |
| 131 |
| 132 ; IASM-NEXT: .byte 0x1 |
| 133 ; IASM-NEXT: .byte 0x50 |
| 134 ; IASM-NEXT: .byte 0xa0 |
| 135 ; IASM-NEXT: .byte 0xe1 |
| 136 |
| 137 ; IASM-NEXT: bl DoSomething @ .word ebfffffe |
| 138 ; IASM-NEXT: .byte 0x5 |
| 139 ; IASM-NEXT: .byte 0x40 |
| 140 ; IASM-NEXT: .byte 0x84 |
| 141 ; IASM-NEXT: .byte 0xe0 |
| 142 |
| 143 ; IASM-NEXT: .byte 0x4 |
| 144 ; IASM-NEXT: .byte 0x0 |
| 145 ; IASM-NEXT: .byte 0xa0 |
| 146 ; IASM-NEXT: .byte 0xe1 |
| 147 |
| 148 ; IASM-NEXT: .byte 0x4 |
| 149 ; IASM-NEXT: .byte 0xd0 |
| 150 ; IASM-NEXT: .byte 0x8d |
| 151 ; IASM-NEXT: .byte 0xe2 |
| 152 |
| 153 ; IASM-NEXT: .byte 0x30 |
| 154 ; IASM-NEXT: .byte 0x40 |
| 155 ; IASM-NEXT: .byte 0xbd |
| 156 ; IASM-NEXT: .byte 0xe8 |
| 157 |
| 158 ; IASM: .byte 0x1e |
| 159 ; IASM-NEXT: .byte 0xff |
| 160 ; IASM-NEXT: .byte 0x2f |
| 161 ; IASM-NEXT: .byte 0xe1 |
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