Store arguments descriptor in ICData. Remove loading of arguments descriptor at unoptimized call si…

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1471 matching lines @@
 
   __ CallRuntime(kInvokeNoSuchMethodFunctionRuntimeEntry);
 
   __ lw(V0, Address(SP, 4 * kWordSize));  // Get result into V0.
   __ LeaveStubFrameAndReturn();
 }
 
 
 //  T0: function object.
 //  S5: inline cache data object.
-//  S4: arguments descriptor array.
+// Cannot use function object from ICData as it may be the inlined
+// function and not the top-scope function.
 void StubCode::GenerateOptimizedUsageCounterIncrement(Assembler* assembler) {
   __ TraceSimMsg("OptimizedUsageCounterIncrement");
   Register ic_reg = S5;
   Register func_reg = T0;
   if (FLAG_trace_optimized_ic_calls) {
     __ EnterStubFrame();
-    __ addiu(SP, SP, Immediate(-5 * kWordSize));
-    __ sw(T0, Address(SP, 4 * kWordSize));
-    __ sw(S5, Address(SP, 3 * kWordSize));
-    __ sw(S4, Address(SP, 2 * kWordSize));  // Preserve.
+    __ addiu(SP, SP, Immediate(-4 * kWordSize));
+    __ sw(T0, Address(SP, 3 * kWordSize));
+    __ sw(S5, Address(SP, 2 * kWordSize));
     __ sw(ic_reg, Address(SP, 1 * kWordSize));  // Argument.
     __ sw(func_reg, Address(SP, 0 * kWordSize));  // Argument.
     __ CallRuntime(kTraceICCallRuntimeEntry);
-    __ lw(S4, Address(SP, 2 * kWordSize));  // Restore.
-    __ lw(S5, Address(SP, 3 * kWordSize));
-    __ lw(T0, Address(SP, 4 * kWordSize));
-    __ addiu(SP, SP, Immediate(5 * kWordSize));  // Discard argument;
+    __ lw(S5, Address(SP, 2 * kWordSize));
+    __ lw(T0, Address(SP, 3 * kWordSize));
+    __ addiu(SP, SP, Immediate(4 * kWordSize));  // Discard argument;
     __ LeaveStubFrame();
   }
   __ lw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
   Label is_hot;
   if (FlowGraphCompiler::CanOptimize()) {
     ASSERT(FLAG_optimization_counter_threshold > 1);
     __ BranchSignedGreaterEqual(T7, FLAG_optimization_counter_threshold,
                                 &is_hot);
     // As long as VM has no OSR do not optimize in the middle of the function
     // but only at exit so that we have collected all type feedback before
@@ skipping 26 matching lines @@
   }
   __ addiu(T1, T1, Immediate(1));
   __ sw(T1, FieldAddress(func_reg, Function::usage_counter_offset()));
   __ Bind(&is_hot);
 }
 
 
 // Generate inline cache check for 'num_args'.
 //  RA: return address
 //  S5: Inline cache data object.
-//  S4: Arguments descriptor array.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
 // - If receiver is Smi -> load Smi class.
 // - If receiver is not-Smi -> load receiver's class.
 // - Check if 'num_args' (including receiver) match any IC data group.
 // - Match found -> jump to target.
 // - Match not found -> jump to IC miss.
 void StubCode::GenerateNArgsCheckInlineCacheStub(Assembler* assembler,
                                                  intptr_t num_args) {
   __ TraceSimMsg("NArgsCheckInlineCacheStub");
   ASSERT(num_args > 0);
 #if defined(DEBUG)
   { Label ok;
     // Check that the IC data array has NumberOfArgumentsChecked() == num_args.
     // 'num_args_tested' is stored as an untagged int.
     __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset()));
     __ BranchEqual(T0, num_args, &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
+  // Load argument descriptor into S4.
+  __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
   // Preserve return address, since RA is needed for subroutine call.
   __ mov(T2, RA);
   // Loop that checks if there is an IC data match.
   Label loop, update, test, found, get_class_id_as_smi;
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with check entries: classes and target functions.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
 
@@ skipping 147 matching lines @@
   __ LoadClassId(T3, T3);
   __ jr(RA);
   __ delay_slot()->SmiTag(T3);
 }
 
 
 // Use inline cache data array to invoke the target or continue in inline
 // cache miss handler. Stub for 1-argument check (receiver class).
 //  RA: Return address.
 //  S5: Inline cache data object.
-//  S4: Arguments descriptor array.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
 // 2 .. (length - 1): group of checks, each check containing:
 //   - N classes.
 //   - 1 target function.
 void StubCode::GenerateOneArgCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   GenerateNArgsCheckInlineCacheStub(assembler, 1);
 }
@@ skipping 86 matching lines @@
   __ LeaveStubFrame();
 
   // Instead of returning to the patched Dart function, emulate the
   // smashed return code pattern and return to the function's caller.
   __ LeaveDartFrameAndReturn();
 }
 
 
 //  RA: return address (Dart code).
 //  S5: Inline cache data array.
-//  S4: Arguments descriptor array.
 void StubCode::GenerateBreakpointDynamicStub(Assembler* assembler) {
   // Create a stub frame as we are pushing some objects on the stack before
   // calling into the runtime.
   __ TraceSimMsg("BreakpointDynamicStub");
   __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-2 * kWordSize));
-  __ sw(S5, Address(SP, 1 * kWordSize));
-  __ sw(S4, Address(SP, 0 * kWordSize));
+  __ Push(S5);
   __ CallRuntime(kBreakpointDynamicHandlerRuntimeEntry);
-  __ lw(S4, Address(SP, 0 * kWordSize));
-  __ lw(S5, Address(SP, 1 * kWordSize));
-  __ addiu(SP, SP, Immediate(2 * kWordSize));
+  __ Pop(S5);
   __ LeaveStubFrame();
 
   // Find out which dispatch stub to call.
   __ lw(TMP1, FieldAddress(S5, ICData::num_args_tested_offset()));
 
   Label one_arg, two_args, three_args;
   __ BranchEqual(TMP1, 1, &one_arg);
   __ BranchEqual(TMP1, 2, &two_args);
   __ BranchEqual(TMP1, 3, &three_args);
   __ Stop("Unsupported number of arguments tested.");
@@ skipping 375 matching lines @@
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(temp2, Address(SP, 2 * kWordSize));
   __ lw(temp1, Address(SP, 3 * kWordSize));
   __ Ret();
   __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS