Subzero. Moar performance tweaks.

src/IceCfg.cpp

 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the Cfg class.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "IceCfg.h"
 
 #include "IceAssembler.h"
+#include "IceBitVector.h"
 #include "IceCfgNode.h"
 #include "IceClFlags.h"
 #include "IceDefs.h"
 #include "IceELFObjectWriter.h"
 #include "IceGlobalInits.h"
 #include "IceInst.h"
 #include "IceInstVarIter.h"
 #include "IceLiveness.h"
 #include "IceLoopAnalyzer.h"
 #include "IceOperand.h"
@@ skipping 202 matching lines @@
     getContext()->dumpTimers();
 }
 
 void Cfg::computeInOutEdges() {
   // Compute the out-edges.
   for (CfgNode *Node : Nodes)
     Node->computeSuccessors();
 
   // Prune any unreachable nodes before computing in-edges.
   SizeT NumNodes = getNumNodes();
-  llvm::BitVector Reachable(NumNodes);
-  llvm::BitVector Pending(NumNodes);
+  BitVector Reachable(NumNodes);
+  BitVector Pending(NumNodes);
   Pending.set(getEntryNode()->getIndex());
   while (true) {
     int Index = Pending.find_first();
     if (Index == -1)
       break;
     Pending.reset(Index);
     Reachable.set(Index);
     CfgNode *Node = Nodes[Index];
     assert(Node->getIndex() == (SizeT)Index);
     for (CfgNode *Succ : Node->getOutEdges()) {
@@ skipping 168 matching lines @@
   Reordered.reserve(Placed.size() + Unreachable.size());
   for (CfgNode *Node : Placed)
     Reordered.push_back(Node);
   for (CfgNode *Node : Unreachable)
     Reordered.push_back(Node);
   assert(getNumNodes() == Reordered.size());
   swapNodes(Reordered);
 }
 
 namespace {
-void getRandomPostOrder(CfgNode *Node, llvm::BitVector &ToVisit,
+void getRandomPostOrder(CfgNode *Node, BitVector &ToVisit,
                         Ice::NodeList &PostOrder,
                         Ice::RandomNumberGenerator *RNG) {
   assert(ToVisit[Node->getIndex()]);
   ToVisit[Node->getIndex()] = false;
   NodeList Outs = Node->getOutEdges();
   Ice::RandomShuffle(Outs.begin(), Outs.end(),
                      [RNG](int N) { return RNG->next(N); });
   for (CfgNode *Next : Outs) {
     if (ToVisit[Next->getIndex()])
       getRandomPostOrder(Next, ToVisit, PostOrder, RNG);
   }
   PostOrder.push_back(Node);
 }
 } // end of anonymous namespace
 
 void Cfg::shuffleNodes() {
   if (!Ctx->getFlags().shouldReorderBasicBlocks())
     return;
 
   NodeList ReversedReachable;
   NodeList Unreachable;
-  llvm::BitVector ToVisit(Nodes.size(), true);
+  BitVector ToVisit(Nodes.size(), true);
   // Create Random number generator for function reordering
   RandomNumberGenerator RNG(Ctx->getFlags().getRandomSeed(),
                             RPE_BasicBlockReordering, SequenceNumber);
   // Traverse from entry node.
   getRandomPostOrder(getEntryNode(), ToVisit, ReversedReachable, &RNG);
   // Collect the unreachable nodes.
   for (CfgNode *Node : Nodes)
     if (ToVisit[Node->getIndex()])
       Unreachable.push_back(Node);
   // Copy the layout list to the Nodes.
@@ skipping 343 matching lines @@
   for (CfgNode *Node : Nodes)
     Node->livenessLightweight();
 }
 
 void Cfg::liveness(LivenessMode Mode) {
   TimerMarker T(TimerStack::TT_liveness, this);
   Live.reset(new Liveness(this, Mode));
   getVMetadata()->init(VMK_Uses);
   Live->init();
   // Initialize with all nodes needing to be processed.
-  llvm::BitVector NeedToProcess(Nodes.size(), true);
+  BitVector NeedToProcess(Nodes.size(), true);
   while (NeedToProcess.any()) {
     // Iterate in reverse topological order to speed up convergence.
     for (CfgNode *Node : reverse_range(Nodes)) {
       if (NeedToProcess[Node->getIndex()]) {
         NeedToProcess[Node->getIndex()] = false;
         bool Changed = Node->liveness(getLiveness());
         if (Changed) {
           // If the beginning-of-block liveness changed since the last
           // iteration, mark all in-edges as needing to be processed.
           for (CfgNode *Pred : Node->getInEdges())
@@ skipping 301 matching lines @@
     }
   }
   // Print each basic block
   for (CfgNode *Node : Nodes)
     Node->dump(this);
   if (isVerbose(IceV_Instructions))
     Str << "}\n";
 }
 
 } // end of namespace Ice