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1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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109 case RCX86_Is32To8: | 109 case RCX86_Is32To8: |
110 return "i32to8"; // 32-bit GPR truncable to i8 | 110 return "i32to8"; // 32-bit GPR truncable to i8 |
111 case RCX86_Is16To8: | 111 case RCX86_Is16To8: |
112 return "i16to8"; // 16-bit GPR truncable to i8 | 112 return "i16to8"; // 16-bit GPR truncable to i8 |
113 case RCX86_IsTrunc8Rcvr: | 113 case RCX86_IsTrunc8Rcvr: |
114 return "i8from"; // 8-bit GPR truncable from wider GPRs | 114 return "i8from"; // 8-bit GPR truncable from wider GPRs |
115 case RCX86_IsAhRcvr: | 115 case RCX86_IsAhRcvr: |
116 return "i8fromah"; // 8-bit GPR that ah can be assigned to | 116 return "i8fromah"; // 8-bit GPR that ah can be assigned to |
117 } | 117 } |
118 } | 118 } |
119 llvm::SmallBitVector getRegisterSet(RegSetMask Include, | 119 SmallBitVector getRegisterSet(RegSetMask Include, |
120 RegSetMask Exclude) const override; | 120 RegSetMask Exclude) const override; |
121 const llvm::SmallBitVector & | 121 const SmallBitVector & |
122 getRegistersForVariable(const Variable *Var) const override { | 122 getRegistersForVariable(const Variable *Var) const override { |
123 RegClass RC = Var->getRegClass(); | 123 RegClass RC = Var->getRegClass(); |
124 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); | 124 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); |
125 return TypeToRegisterSet[RC]; | 125 return TypeToRegisterSet[RC]; |
126 } | 126 } |
127 | 127 |
128 const llvm::SmallBitVector & | 128 const SmallBitVector & |
129 getAllRegistersForVariable(const Variable *Var) const override { | 129 getAllRegistersForVariable(const Variable *Var) const override { |
130 RegClass RC = Var->getRegClass(); | 130 RegClass RC = Var->getRegClass(); |
131 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); | 131 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); |
132 return TypeToRegisterSetUnfiltered[RC]; | 132 return TypeToRegisterSetUnfiltered[RC]; |
133 } | 133 } |
134 | 134 |
135 const llvm::SmallBitVector & | 135 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { |
136 getAliasesForRegister(RegNumT Reg) const override { | |
137 Reg.assertIsValid(); | 136 Reg.assertIsValid(); |
138 return RegisterAliases[Reg]; | 137 return RegisterAliases[Reg]; |
139 } | 138 } |
140 | 139 |
141 bool hasFramePointer() const override { return IsEbpBasedFrame; } | 140 bool hasFramePointer() const override { return IsEbpBasedFrame; } |
142 void setHasFramePointer() override { IsEbpBasedFrame = true; } | 141 void setHasFramePointer() override { IsEbpBasedFrame = true; } |
143 RegNumT getStackReg() const override { return Traits::StackPtr; } | 142 RegNumT getStackReg() const override { return Traits::StackPtr; } |
144 RegNumT getFrameReg() const override { return Traits::FramePtr; } | 143 RegNumT getFrameReg() const override { return Traits::FramePtr; } |
145 RegNumT getFrameOrStackReg() const override { | 144 RegNumT getFrameOrStackReg() const override { |
146 return IsEbpBasedFrame ? getFrameReg() : getStackReg(); | 145 return IsEbpBasedFrame ? getFrameReg() : getStackReg(); |
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259 void lowerLoad(const InstLoad *Instr) override; | 258 void lowerLoad(const InstLoad *Instr) override; |
260 void lowerPhi(const InstPhi *Instr) override; | 259 void lowerPhi(const InstPhi *Instr) override; |
261 void lowerRet(const InstRet *Instr) override; | 260 void lowerRet(const InstRet *Instr) override; |
262 void lowerSelect(const InstSelect *Instr) override; | 261 void lowerSelect(const InstSelect *Instr) override; |
263 void lowerStore(const InstStore *Instr) override; | 262 void lowerStore(const InstStore *Instr) override; |
264 void lowerSwitch(const InstSwitch *Instr) override; | 263 void lowerSwitch(const InstSwitch *Instr) override; |
265 void lowerUnreachable(const InstUnreachable *Instr) override; | 264 void lowerUnreachable(const InstUnreachable *Instr) override; |
266 void lowerOther(const Inst *Instr) override; | 265 void lowerOther(const Inst *Instr) override; |
267 void lowerRMW(const InstX86FakeRMW *RMW); | 266 void lowerRMW(const InstX86FakeRMW *RMW); |
268 void prelowerPhis() override; | 267 void prelowerPhis() override; |
269 uint32_t getCallStackArgumentsSizeBytes(const std::vector<Type> &ArgTypes, | 268 uint32_t getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes, |
270 Type ReturnType); | 269 Type ReturnType); |
271 uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override; | 270 uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override; |
272 void genTargetHelperCallFor(Inst *Instr) override; | 271 void genTargetHelperCallFor(Inst *Instr) override; |
273 | 272 |
274 /// OptAddr wraps all the possible operands that an x86 address might have. | 273 /// OptAddr wraps all the possible operands that an x86 address might have. |
275 struct OptAddr { | 274 struct OptAddr { |
276 Variable *Base = nullptr; | 275 Variable *Base = nullptr; |
277 Variable *Index = nullptr; | 276 Variable *Index = nullptr; |
278 uint16_t Shift = 0; | 277 uint16_t Shift = 0; |
279 int32_t Offset = 0; | 278 int32_t Offset = 0; |
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430 Variable *makeVectorOfHighOrderBits(Type Ty, RegNumT RegNum = RegNumT()); | 429 Variable *makeVectorOfHighOrderBits(Type Ty, RegNumT RegNum = RegNumT()); |
431 Variable *makeVectorOfFabsMask(Type Ty, RegNumT RegNum = RegNumT()); | 430 Variable *makeVectorOfFabsMask(Type Ty, RegNumT RegNum = RegNumT()); |
432 /// @} | 431 /// @} |
433 | 432 |
434 /// Return a memory operand corresponding to a stack allocated Variable. | 433 /// Return a memory operand corresponding to a stack allocated Variable. |
435 X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot, | 434 X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot, |
436 uint32_t Offset = 0); | 435 uint32_t Offset = 0); |
437 | 436 |
438 void | 437 void |
439 makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation, | 438 makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation, |
440 const llvm::SmallBitVector &ExcludeRegisters, | 439 const SmallBitVector &ExcludeRegisters, |
441 uint64_t Salt) const override; | 440 uint64_t Salt) const override; |
442 | 441 |
443 /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the | 442 /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the |
444 /// instruction's operand is a memory reference. This is only needed for | 443 /// instruction's operand is a memory reference. This is only needed for |
445 /// x86-64 NaCl sandbox. | 444 /// x86-64 NaCl sandbox. |
446 template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None> | 445 template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None> |
447 class AutoMemorySandboxer { | 446 class AutoMemorySandboxer { |
448 AutoMemorySandboxer() = delete; | 447 AutoMemorySandboxer() = delete; |
449 AutoMemorySandboxer(const AutoMemorySandboxer &) = delete; | 448 AutoMemorySandboxer(const AutoMemorySandboxer &) = delete; |
450 AutoMemorySandboxer &operator=(const AutoMemorySandboxer &) = delete; | 449 AutoMemorySandboxer &operator=(const AutoMemorySandboxer &) = delete; |
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978 void findRMW(); | 977 void findRMW(); |
979 | 978 |
980 InstructionSetEnum InstructionSet = Traits::InstructionSet::Begin; | 979 InstructionSetEnum InstructionSet = Traits::InstructionSet::Begin; |
981 bool IsEbpBasedFrame = false; | 980 bool IsEbpBasedFrame = false; |
982 bool NeedsStackAlignment = false; | 981 bool NeedsStackAlignment = false; |
983 size_t SpillAreaSizeBytes = 0; | 982 size_t SpillAreaSizeBytes = 0; |
984 size_t FixedAllocaSizeBytes = 0; | 983 size_t FixedAllocaSizeBytes = 0; |
985 size_t FixedAllocaAlignBytes = 0; | 984 size_t FixedAllocaAlignBytes = 0; |
986 bool PrologEmitsFixedAllocas = false; | 985 bool PrologEmitsFixedAllocas = false; |
987 uint32_t MaxOutArgsSizeBytes = 0; | 986 uint32_t MaxOutArgsSizeBytes = 0; |
988 static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet; | 987 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSet; |
989 static std::array<llvm::SmallBitVector, RCX86_NUM> | 988 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSetUnfiltered; |
990 TypeToRegisterSetUnfiltered; | 989 static std::array<SmallBitVector, Traits::RegisterSet::Reg_NUM> |
991 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> | |
992 RegisterAliases; | 990 RegisterAliases; |
993 llvm::SmallBitVector RegsUsed; | 991 SmallBitVector RegsUsed; |
994 std::array<VarList, IceType_NUM> PhysicalRegisters; | 992 std::array<VarList, IceType_NUM> PhysicalRegisters; |
995 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the | 993 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the |
996 // current sandboxing type. | 994 // current sandboxing type. |
997 Variable *RebasePtr = nullptr; | 995 Variable *RebasePtr = nullptr; |
998 | 996 |
999 /// Randomize a given immediate operand | 997 /// Randomize a given immediate operand |
1000 Operand *randomizeOrPoolImmediate(Constant *Immediate, | 998 Operand *randomizeOrPoolImmediate(Constant *Immediate, |
1001 RegNumT RegNum = RegNumT()); | 999 RegNumT RegNum = RegNumT()); |
1002 X86OperandMem *randomizeOrPoolImmediate(X86OperandMem *MemOperand, | 1000 X86OperandMem *randomizeOrPoolImmediate(X86OperandMem *MemOperand, |
1003 RegNumT RegNum = RegNumT()); | 1001 RegNumT RegNum = RegNumT()); |
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1123 | 1121 |
1124 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} | 1122 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} |
1125 }; | 1123 }; |
1126 | 1124 |
1127 } // end of namespace X86NAMESPACE | 1125 } // end of namespace X86NAMESPACE |
1128 } // end of namespace Ice | 1126 } // end of namespace Ice |
1129 | 1127 |
1130 #include "IceTargetLoweringX86BaseImpl.h" | 1128 #include "IceTargetLoweringX86BaseImpl.h" |
1131 | 1129 |
1132 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 1130 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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