Subzero. Performance tweaks.

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 98 matching lines @@
     case RCX86_Is32To8:
       return "i32to8"; // 32-bit GPR truncable to i8
     case RCX86_Is16To8:
       return "i16to8"; // 16-bit GPR truncable to i8
     case RCX86_IsTrunc8Rcvr:
       return "i8from"; // 8-bit GPR truncable from wider GPRs
     case RCX86_IsAhRcvr:
       return "i8fromah"; // 8-bit GPR that ah can be assigned to
     }
   }
-  llvm::SmallBitVector getRegisterSet(RegSetMask Include,
-                                      RegSetMask Exclude) const override;
-  const llvm::SmallBitVector &
+  SmallBitVector getRegisterSet(RegSetMask Include,
+                                RegSetMask Exclude) const override;
+  const SmallBitVector &
   getRegistersForVariable(const Variable *Var) const override {
     RegClass RC = Var->getRegClass();
     assert(static_cast<RegClassX86>(RC) < RCX86_NUM);
     return TypeToRegisterSet[RC];
   }
 
-  const llvm::SmallBitVector &
+  const SmallBitVector &
   getAllRegistersForVariable(const Variable *Var) const override {
     RegClass RC = Var->getRegClass();
     assert(static_cast<RegClassX86>(RC) < RCX86_NUM);
     return TypeToRegisterSetUnfiltered[RC];
   }
 
-  const llvm::SmallBitVector &
-  getAliasesForRegister(RegNumT Reg) const override {
+  const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
     Reg.assertIsValid();
     return RegisterAliases[Reg];
   }
 
   bool hasFramePointer() const override { return IsEbpBasedFrame; }
   void setHasFramePointer() override { IsEbpBasedFrame = true; }
   RegNumT getStackReg() const override { return Traits::StackPtr; }
   RegNumT getFrameReg() const override { return Traits::FramePtr; }
   RegNumT getFrameOrStackReg() const override {
     return IsEbpBasedFrame ? getFrameReg() : getStackReg();
@@ skipping 112 matching lines @@
   void lowerLoad(const InstLoad *Instr) override;
   void lowerPhi(const InstPhi *Instr) override;
   void lowerRet(const InstRet *Instr) override;
   void lowerSelect(const InstSelect *Instr) override;
   void lowerStore(const InstStore *Instr) override;
   void lowerSwitch(const InstSwitch *Instr) override;
   void lowerUnreachable(const InstUnreachable *Instr) override;
   void lowerOther(const Inst *Instr) override;
   void lowerRMW(const InstX86FakeRMW *RMW);
   void prelowerPhis() override;
-  uint32_t getCallStackArgumentsSizeBytes(const std::vector<Type> &ArgTypes,
+  uint32_t getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes,
                                           Type ReturnType);
   uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override;
   void genTargetHelperCallFor(Inst *Instr) override;
 
   /// OptAddr wraps all the possible operands that an x86 address might have.
   struct OptAddr {
     Variable *Base = nullptr;
     Variable *Index = nullptr;
     uint16_t Shift = 0;
     int32_t Offset = 0;
@@ skipping 150 matching lines @@
   Variable *makeVectorOfHighOrderBits(Type Ty, RegNumT RegNum = RegNumT());
   Variable *makeVectorOfFabsMask(Type Ty, RegNumT RegNum = RegNumT());
   /// @}
 
   /// Return a memory operand corresponding to a stack allocated Variable.
   X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
                                               uint32_t Offset = 0);
 
   void
   makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
-                                const llvm::SmallBitVector &ExcludeRegisters,
+                                const SmallBitVector &ExcludeRegisters,
                                 uint64_t Salt) const override;
 
   /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the
   /// instruction's operand is a memory reference. This is only needed for
   /// x86-64 NaCl sandbox.
   template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None>
   class AutoMemorySandboxer {
     AutoMemorySandboxer() = delete;
     AutoMemorySandboxer(const AutoMemorySandboxer &) = delete;
     AutoMemorySandboxer &operator=(const AutoMemorySandboxer &) = delete;
@@ skipping 527 matching lines @@
   void findRMW();
 
   InstructionSetEnum InstructionSet = Traits::InstructionSet::Begin;
   bool IsEbpBasedFrame = false;
   bool NeedsStackAlignment = false;
   size_t SpillAreaSizeBytes = 0;
   size_t FixedAllocaSizeBytes = 0;
   size_t FixedAllocaAlignBytes = 0;
   bool PrologEmitsFixedAllocas = false;
   uint32_t MaxOutArgsSizeBytes = 0;
-  static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet;
-  static std::array<llvm::SmallBitVector, RCX86_NUM>
-      TypeToRegisterSetUnfiltered;
-  static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM>
+  static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSet;
+  static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSetUnfiltered;
+  static std::array<SmallBitVector, Traits::RegisterSet::Reg_NUM>
       RegisterAliases;
-  llvm::SmallBitVector RegsUsed;
+  SmallBitVector RegsUsed;
   std::array<VarList, IceType_NUM> PhysicalRegisters;
   // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the
   // current sandboxing type.
   Variable *RebasePtr = nullptr;
 
   /// Randomize a given immediate operand
   Operand *randomizeOrPoolImmediate(Constant *Immediate,
                                     RegNumT RegNum = RegNumT());
   X86OperandMem *randomizeOrPoolImmediate(X86OperandMem *MemOperand,
                                           RegNumT RegNum = RegNumT());
@@ skipping 119 matching lines @@
 
   explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {}
 };
 
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H