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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 1738443002: Subzero. Performance tweaks. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments -- all of them Created 4 years, 9 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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104 #undef X 104 #undef X
105 }; 105 };
106 106
107 const size_t TargetX8632Traits::TableTypeX8632AttributesSize = 107 const size_t TargetX8632Traits::TableTypeX8632AttributesSize =
108 llvm::array_lengthof(TableTypeX8632Attributes); 108 llvm::array_lengthof(TableTypeX8632Attributes);
109 109
110 const uint32_t TargetX8632Traits::X86_STACK_ALIGNMENT_BYTES = 16; 110 const uint32_t TargetX8632Traits::X86_STACK_ALIGNMENT_BYTES = 16;
111 const char *TargetX8632Traits::TargetName = "X8632"; 111 const char *TargetX8632Traits::TargetName = "X8632";
112 112
113 template <> 113 template <>
114 std::array<llvm::SmallBitVector, RCX86_NUM> 114 std::array<SmallBitVector, RCX86_NUM>
115 TargetX86Base<X8632::Traits>::TypeToRegisterSet = {{}}; 115 TargetX86Base<X8632::Traits>::TypeToRegisterSet = {{}};
116 116
117 template <> 117 template <>
118 std::array<llvm::SmallBitVector, RCX86_NUM> 118 std::array<SmallBitVector, RCX86_NUM>
119 TargetX86Base<X8632::Traits>::TypeToRegisterSetUnfiltered = {{}}; 119 TargetX86Base<X8632::Traits>::TypeToRegisterSetUnfiltered = {{}};
120 120
121 template <> 121 template <>
122 std::array<llvm::SmallBitVector, 122 std::array<SmallBitVector,
123 TargetX86Base<X8632::Traits>::Traits::RegisterSet::Reg_NUM> 123 TargetX86Base<X8632::Traits>::Traits::RegisterSet::Reg_NUM>
124 TargetX86Base<X8632::Traits>::RegisterAliases = {{}}; 124 TargetX86Base<X8632::Traits>::RegisterAliases = {{}};
125 125
126 template <> 126 template <>
127 FixupKind TargetX86Base<X8632::Traits>::PcRelFixup = 127 FixupKind TargetX86Base<X8632::Traits>::PcRelFixup =
128 TargetX86Base<X8632::Traits>::Traits::FK_PcRel; 128 TargetX86Base<X8632::Traits>::Traits::FK_PcRel;
129 129
130 template <> 130 template <>
131 FixupKind TargetX86Base<X8632::Traits>::AbsFixup = 131 FixupKind TargetX86Base<X8632::Traits>::AbsFixup =
132 TargetX86Base<X8632::Traits>::Traits::FK_Abs; 132 TargetX86Base<X8632::Traits>::Traits::FK_Abs;
(...skipping 110 matching lines...) Expand 10 before | Expand all | Expand 10 after
243 : getPhysicalRegister(Traits::RegisterSet::Reg_eax); 243 : getPhysicalRegister(Traits::RegisterSet::Reg_eax);
244 auto *BeforeAddReloc = RelocOffset::create(Ctx); 244 auto *BeforeAddReloc = RelocOffset::create(Ctx);
245 BeforeAddReloc->setSubtract(true); 245 BeforeAddReloc->setSubtract(true);
246 auto *BeforeAdd = InstX86Label::create(Func, this); 246 auto *BeforeAdd = InstX86Label::create(Func, this);
247 BeforeAdd->setRelocOffset(BeforeAddReloc); 247 BeforeAdd->setRelocOffset(BeforeAddReloc);
248 248
249 auto *AfterAddReloc = RelocOffset::create(Ctx); 249 auto *AfterAddReloc = RelocOffset::create(Ctx);
250 auto *AfterAdd = InstX86Label::create(Func, this); 250 auto *AfterAdd = InstX86Label::create(Func, this);
251 AfterAdd->setRelocOffset(AfterAddReloc); 251 AfterAdd->setRelocOffset(AfterAddReloc);
252 252
253 auto *ImmSize = RelocOffset::create(Ctx, -typeWidthInBytes(IceType_i32)); 253 const RelocOffsetT ImmSize = -typeWidthInBytes(IceType_i32);
254 254
255 auto *GotFromPc = llvm::cast<ConstantRelocatable>( 255 auto *GotFromPc = llvm::cast<ConstantRelocatable>(
256 Ctx->getConstantSym({AfterAddReloc, BeforeAddReloc, ImmSize}, 256 Ctx->getConstantSym(ImmSize, {AfterAddReloc, BeforeAddReloc},
257 GlobalOffsetTable, GlobalOffsetTable, true)); 257 GlobalOffsetTable, GlobalOffsetTable, true));
258 258
259 // Insert a new version of InstX86GetIP. 259 // Insert a new version of InstX86GetIP.
260 Context.insert<Traits::Insts::GetIP>(CallDest); 260 Context.insert<Traits::Insts::GetIP>(CallDest);
261 261
262 Context.insert(BeforeAdd); 262 Context.insert(BeforeAdd);
263 _add(CallDest, GotFromPc); 263 _add(CallDest, GotFromPc);
264 Context.insert(AfterAdd); 264 Context.insert(AfterAdd);
265 265
266 // Spill the register to its home stack location if necessary. 266 // Spill the register to its home stack location if necessary.
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477 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \ 477 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \
478 static_assert(_table1_##tag == _table2_##tag, \ 478 static_assert(_table1_##tag == _table2_##tag, \
479 "Inconsistency between ICETYPEX8632_TABLE and ICETYPE_TABLE"); 479 "Inconsistency between ICETYPEX8632_TABLE and ICETYPE_TABLE");
480 ICETYPE_TABLE 480 ICETYPE_TABLE
481 #undef X 481 #undef X
482 } // end of namespace dummy3 482 } // end of namespace dummy3
483 } // end of anonymous namespace 483 } // end of anonymous namespace
484 484
485 } // end of namespace X8632 485 } // end of namespace X8632
486 } // end of namespace Ice 486 } // end of namespace Ice
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