Subzero. Performance tweaks.

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 32 matching lines @@
   }
 
   void translateOm1() override;
   void translateO2() override;
   bool doBranchOpt(Inst *Instr, const CfgNode *NextNode) override;
 
   SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; }
   Variable *getPhysicalRegister(RegNumT RegNum,
                                 Type Ty = IceType_void) override;
   IceString getRegName(RegNumT RegNum, Type Ty) const override;
-  llvm::SmallBitVector getRegisterSet(RegSetMask Include,
-                                      RegSetMask Exclude) const override;
-  const llvm::SmallBitVector &
+  SmallBitVector getRegisterSet(RegSetMask Include,
+                                RegSetMask Exclude) const override;
+  const SmallBitVector &
   getRegistersForVariable(const Variable *Var) const override {
     RegClass RC = Var->getRegClass();
     assert(RC < RC_Target);
     return TypeToRegisterSet[RC];
   }
-  const llvm::SmallBitVector &
+  const SmallBitVector &
   getAllRegistersForVariable(const Variable *Var) const override {
     RegClass RC = Var->getRegClass();
     assert(RC < RC_Target);
     return TypeToRegisterSetUnfiltered[RC];
   }
-  const llvm::SmallBitVector &
-  getAliasesForRegister(RegNumT Reg) const override {
+  const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
     return RegisterAliases[Reg];
   }
   bool hasFramePointer() const override { return UsesFramePointer; }
   void setHasFramePointer() override { UsesFramePointer = true; }
   RegNumT getStackReg() const override { return RegMIPS32::Reg_SP; }
   RegNumT getFrameReg() const override { return RegMIPS32::Reg_FP; }
   RegNumT getFrameOrStackReg() const override {
     return UsesFramePointer ? getFrameReg() : getStackReg();
   }
   size_t typeWidthInBytesOnStack(Type Ty) const override {
@@ skipping 198 matching lines @@
     (void)Instr;
     return 0;
   }
   void genTargetHelperCallFor(Inst *Instr) override { (void)Instr; }
   void doAddressOptLoad() override;
   void doAddressOptStore() override;
   void randomlyInsertNop(float Probability,
                          RandomNumberGenerator &RNG) override;
   void
   makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
-                                const llvm::SmallBitVector &ExcludeRegisters,
+                                const SmallBitVector &ExcludeRegisters,
                                 uint64_t Salt) const override;
 
   bool UsesFramePointer = false;
   bool NeedsStackAlignment = false;
-  static llvm::SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
-  static llvm::SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
-  static llvm::SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
-  llvm::SmallBitVector RegsUsed;
+  static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
+  static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
+  static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
+  SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
 
 private:
   ENABLE_MAKE_UNIQUE;
 };
 
 class TargetDataMIPS32 final : public TargetDataLowering {
   TargetDataMIPS32() = delete;
   TargetDataMIPS32(const TargetDataMIPS32 &) = delete;
   TargetDataMIPS32 &operator=(const TargetDataMIPS32 &) = delete;
@@ skipping 32 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H