Subzero. Performance tweaks.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 60 matching lines @@
   }
 }
 
 } // end of anonymous namespace
 
 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {}
 
 void TargetMIPS32::staticInit(GlobalContext *Ctx) {
   (void)Ctx;
   RegNumT::setLimit(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM);
-  llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM);
+  SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM);
+  SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM);
+  SmallBitVector Float32Registers(RegMIPS32::Reg_NUM);
+  SmallBitVector Float64Registers(RegMIPS32::Reg_NUM);
+  SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM);
+  SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM);
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
   IntegerRegisters[RegMIPS32::val] = isInt;                                    \
   I64PairRegisters[RegMIPS32::val] = isI64Pair;                                \
   Float32Registers[RegMIPS32::val] = isFP32;                                   \
   Float64Registers[RegMIPS32::val] = isFP64;                                   \
   VectorRegisters[RegMIPS32::val] = isVec128;                                  \
   RegisterAliases[RegMIPS32::val].resize(RegMIPS32::Reg_NUM);                  \
   for (SizeT RegAlias : alias_init) {                                          \
     assert(!RegisterAliases[RegMIPS32::val][RegAlias] &&                       \
@@ skipping 427 matching lines @@
       Offset =
           llvm::cast<ConstantInteger32>(Ctx->getConstantInt32(NextOffsetVal));
     }
     return OperandMIPS32Mem::create(Func, SplitType, Base, Offset,
                                     Mem->getAddrMode());
   }
   llvm_unreachable("Unsupported operand type");
   return nullptr;
 }
 
-llvm::SmallBitVector TargetMIPS32::getRegisterSet(RegSetMask Include,
-                                                  RegSetMask Exclude) const {
-  llvm::SmallBitVector Registers(RegMIPS32::Reg_NUM);
+SmallBitVector TargetMIPS32::getRegisterSet(RegSetMask Include,
+                                            RegSetMask Exclude) const {
+  SmallBitVector Registers(RegMIPS32::Reg_NUM);
 
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
   if (scratch && (Include & RegSet_CallerSave))                                \
     Registers[RegMIPS32::val] = true;                                          \
   if (preserved && (Include & RegSet_CalleeSave))                              \
     Registers[RegMIPS32::val] = true;                                          \
   if (stackptr && (Include & RegSet_StackPointer))                             \
     Registers[RegMIPS32::val] = true;                                          \
   if (frameptr && (Include & RegSet_FramePointer))                             \
@@ skipping 596 matching lines @@
 void TargetMIPS32::postLower() {
   if (Ctx->getFlags().getOptLevel() == Opt_m1)
     return;
   // TODO(rkotler): Find two-address non-SSA instructions where Dest==Src0,
   // and set the IsDestRedefined flag to keep liveness analysis consistent.
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::makeRandomRegisterPermutation(
     llvm::SmallVectorImpl<RegNumT> &Permutation,
-    const llvm::SmallBitVector &ExcludeRegisters, uint64_t Salt) const {
+    const SmallBitVector &ExcludeRegisters, uint64_t Salt) const {
   (void)Permutation;
   (void)ExcludeRegisters;
   (void)Salt;
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 /* TODO(jvoung): avoid duplicate symbols with multiple targets.
 void ConstantUndef::emitWithoutDollar(GlobalContext *) const {
   llvm_unreachable("Not expecting to emitWithoutDollar undef");
 }
@@ skipping 122 matching lines @@
 
 void TargetHeaderMIPS32::lower() {
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.set\t"
       << "nomicromips\n";
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
-llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
-llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
-llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
+SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
+SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
+SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice