Revert of [Interpreter] Implements calls through CallICStub in the interpreter.

src/mips/interface-descriptors-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #if V8_TARGET_ARCH_MIPS
 
 #include "src/interface-descriptors.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 417 matching lines @@
 void InterpreterPushArgsAndCallDescriptor::InitializePlatformSpecific(
     CallInterfaceDescriptorData* data) {
   Register registers[] = {
       a0,  // argument count (not including receiver)
       a2,  // address of first argument
       a1   // the target callable to be call
   };
   data->InitializePlatformSpecific(arraysize(registers), registers);
 }
 
-void InterpreterPushArgsAndCallICDescriptor::InitializePlatformSpecific(
-    CallInterfaceDescriptorData* data) {
-  Register registers[] = {
-      a0,  // argument count (not including receiver)
-      t0,  // address of first argument
-      a1,  // the target callable to be call
-      a3,  // feedback vector slot id
-      a2   // type feedback vector
-  };
-  data->InitializePlatformSpecific(arraysize(registers), registers);
-}
-
 void InterpreterPushArgsAndConstructDescriptor::InitializePlatformSpecific(
     CallInterfaceDescriptorData* data) {
   Register registers[] = {
       a0,  // argument count (not including receiver)
       a3,  // new target
       a1,  // constructor to call
       a2   // address of the first argument
   };
   data->InitializePlatformSpecific(arraysize(registers), registers);
 }
 
 void InterpreterCEntryDescriptor::InitializePlatformSpecific(
     CallInterfaceDescriptorData* data) {
   Register registers[] = {
       a0,  // argument count (argc)
       a2,  // address of first argument (argv)
       a1   // the runtime function to call
   };
   data->InitializePlatformSpecific(arraysize(registers), registers);
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS