Unbox/Box Float64x2 and inline typed array loads and stores

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
@@ skipping 588 matching lines @@
   } else {
     return Location::kRegister;
   }
 }
 
 
 static Location::Kind RegisterKindForResult(Instruction* instr) {
   if ((instr->representation() == kUnboxedDouble) ||
       (instr->representation() == kUnboxedMint) ||
       (instr->representation() == kUnboxedFloat32x4) ||
-      (instr->representation() == kUnboxedInt32x4)) {
+      (instr->representation() == kUnboxedInt32x4) ||
+      (instr->representation() == kUnboxedFloat64x2)) {
     return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 //
 // When describing shape of live ranges in comments below we are going to use
 // the following notation:
@@ skipping 975 matching lines @@
   const intptr_t end = last_sibling->End();
 
   // During fpu register allocation spill slot indices are computed in terms of
   // double (64bit) stack slots. We treat quad stack slot (128bit) as a
   // consecutive pair of two double spill slots.
   // Special care is taken to never allocate the same index to both
   // double and quad spill slots as it complicates disambiguation during
   // parallel move resolution.
   const bool need_quad = (register_kind_ == Location::kFpuRegister) &&
       ((range->representation() == kUnboxedFloat32x4) ||
-       (range->representation() == kUnboxedInt32x4));
+       (range->representation() == kUnboxedInt32x4)   ||
+       (range->representation() == kUnboxedFloat64x2));
 
   // Search for a free spill slot among allocated: the value in it should be
   // dead and its type should match (e.g. it should not be a part of the quad if
   // we are allocating normal double slot).
   // For CPU registers we need to take reserved slots for try-catch into
   // account.
   intptr_t idx = register_kind_ == Location::kRegister
       ? flow_graph_.graph_entry()->fixed_slot_count()
       : 0;
   for (; idx < spill_slots_.length(); idx++) {
@@ skipping 28 matching lines @@
     range->set_spill_slot(Location::StackSlot(idx));
   } else {
     // We use the index of the slot with the lowest address as an index for the
     // FPU register spill slot. In terms of indexes this relation is inverted:
     // so we have to take the highest index.
     const intptr_t slot_idx = cpu_spill_slot_count_ +
         idx * kDoubleSpillFactor + (kDoubleSpillFactor - 1);
 
     Location location;
     if ((range->representation() == kUnboxedFloat32x4) ||
-        (range->representation() == kUnboxedInt32x4)) {
+        (range->representation() == kUnboxedInt32x4) ||
+        (range->representation() == kUnboxedFloat64x2)) {
       ASSERT(need_quad);
       location = Location::QuadStackSlot(slot_idx);
     } else {
       ASSERT((range->representation() == kUnboxedDouble) ||
              (range->representation() == kUnboxedMint));
       location = Location::DoubleStackSlot(slot_idx);
     }
     range->set_spill_slot(location);
   }
 
@@ skipping 937 matching lines @@
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart