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| 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. |
| 4 |
| 5 // A Disassembler object is used to disassemble a block of code instruction by |
| 6 // instruction. The default implementation of the NameConverter object can be |
| 7 // overriden to modify register names or to do symbol lookup on addresses. |
| 8 // |
| 9 // The example below will disassemble a block of code and print it to stdout. |
| 10 // |
| 11 // NameConverter converter; |
| 12 // Disassembler d(converter); |
| 13 // for (byte* pc = begin; pc < end;) { |
| 14 // v8::internal::EmbeddedVector<char, 256> buffer; |
| 15 // byte* prev_pc = pc; |
| 16 // pc += d.InstructionDecode(buffer, pc); |
| 17 // printf("%p %08x %s\n", |
| 18 // prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer); |
| 19 // } |
| 20 // |
| 21 // The Disassembler class also has a convenience method to disassemble a block |
| 22 // of code into a FILE*, meaning that the above functionality could also be |
| 23 // achieved by just calling Disassembler::Disassemble(stdout, begin, end); |
| 24 |
| 25 #include <assert.h> |
| 26 #include <stdarg.h> |
| 27 #include <stdio.h> |
| 28 #include <string.h> |
| 29 |
| 30 #if V8_TARGET_ARCH_S390 |
| 31 |
| 32 #include "src/base/platform/platform.h" |
| 33 #include "src/disasm.h" |
| 34 #include "src/macro-assembler.h" |
| 35 #include "src/s390/constants-s390.h" |
| 36 |
| 37 namespace v8 { |
| 38 namespace internal { |
| 39 |
| 40 //------------------------------------------------------------------------------ |
| 41 |
| 42 // Decoder decodes and disassembles instructions into an output buffer. |
| 43 // It uses the converter to convert register names and call destinations into |
| 44 // more informative description. |
| 45 class Decoder { |
| 46 public: |
| 47 Decoder(const disasm::NameConverter& converter, Vector<char> out_buffer) |
| 48 : converter_(converter), out_buffer_(out_buffer), out_buffer_pos_(0) { |
| 49 out_buffer_[out_buffer_pos_] = '\0'; |
| 50 } |
| 51 |
| 52 ~Decoder() {} |
| 53 |
| 54 // Writes one disassembled instruction into 'buffer' (0-terminated). |
| 55 // Returns the length of the disassembled machine instruction in bytes. |
| 56 int InstructionDecode(byte* instruction); |
| 57 |
| 58 private: |
| 59 // Bottleneck functions to print into the out_buffer. |
| 60 void PrintChar(const char ch); |
| 61 void Print(const char* str); |
| 62 |
| 63 // Printing of common values. |
| 64 void PrintRegister(int reg); |
| 65 void PrintDRegister(int reg); |
| 66 void PrintSoftwareInterrupt(SoftwareInterruptCodes svc); |
| 67 |
| 68 // Handle formatting of instructions and their options. |
| 69 int FormatRegister(Instruction* instr, const char* option); |
| 70 int FormatFloatingRegister(Instruction* instr, const char* option); |
| 71 int FormatMask(Instruction* instr, const char* option); |
| 72 int FormatDisplacement(Instruction* instr, const char* option); |
| 73 int FormatImmediate(Instruction* instr, const char* option); |
| 74 int FormatOption(Instruction* instr, const char* option); |
| 75 void Format(Instruction* instr, const char* format); |
| 76 void Unknown(Instruction* instr); |
| 77 void UnknownFormat(Instruction* instr, const char* opcname); |
| 78 |
| 79 bool DecodeTwoByte(Instruction* instr); |
| 80 bool DecodeFourByte(Instruction* instr); |
| 81 bool DecodeSixByte(Instruction* instr); |
| 82 |
| 83 const disasm::NameConverter& converter_; |
| 84 Vector<char> out_buffer_; |
| 85 int out_buffer_pos_; |
| 86 |
| 87 DISALLOW_COPY_AND_ASSIGN(Decoder); |
| 88 }; |
| 89 |
| 90 // Support for assertions in the Decoder formatting functions. |
| 91 #define STRING_STARTS_WITH(string, compare_string) \ |
| 92 (strncmp(string, compare_string, strlen(compare_string)) == 0) |
| 93 |
| 94 // Append the ch to the output buffer. |
| 95 void Decoder::PrintChar(const char ch) { out_buffer_[out_buffer_pos_++] = ch; } |
| 96 |
| 97 // Append the str to the output buffer. |
| 98 void Decoder::Print(const char* str) { |
| 99 char cur = *str++; |
| 100 while (cur != '\0' && (out_buffer_pos_ < (out_buffer_.length() - 1))) { |
| 101 PrintChar(cur); |
| 102 cur = *str++; |
| 103 } |
| 104 out_buffer_[out_buffer_pos_] = 0; |
| 105 } |
| 106 |
| 107 // Print the register name according to the active name converter. |
| 108 void Decoder::PrintRegister(int reg) { |
| 109 Print(converter_.NameOfCPURegister(reg)); |
| 110 } |
| 111 |
| 112 // Print the double FP register name according to the active name converter. |
| 113 void Decoder::PrintDRegister(int reg) { |
| 114 Print(DoubleRegister::from_code(reg).ToString()); |
| 115 } |
| 116 |
| 117 // Print SoftwareInterrupt codes. Factoring this out reduces the complexity of |
| 118 // the FormatOption method. |
| 119 void Decoder::PrintSoftwareInterrupt(SoftwareInterruptCodes svc) { |
| 120 switch (svc) { |
| 121 case kCallRtRedirected: |
| 122 Print("call rt redirected"); |
| 123 return; |
| 124 case kBreakpoint: |
| 125 Print("breakpoint"); |
| 126 return; |
| 127 default: |
| 128 if (svc >= kStopCode) { |
| 129 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d - 0x%x", |
| 130 svc & kStopCodeMask, svc & kStopCodeMask); |
| 131 } else { |
| 132 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", svc); |
| 133 } |
| 134 return; |
| 135 } |
| 136 } |
| 137 |
| 138 // Handle all register based formatting in this function to reduce the |
| 139 // complexity of FormatOption. |
| 140 int Decoder::FormatRegister(Instruction* instr, const char* format) { |
| 141 DCHECK(format[0] == 'r'); |
| 142 |
| 143 if (format[1] == '1') { // 'r1: register resides in bit 8-11 |
| 144 RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr); |
| 145 int reg = rrinstr->R1Value(); |
| 146 PrintRegister(reg); |
| 147 return 2; |
| 148 } else if (format[1] == '2') { // 'r2: register resides in bit 12-15 |
| 149 RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr); |
| 150 int reg = rrinstr->R2Value(); |
| 151 // indicating it is a r0 for displacement, in which case the offset |
| 152 // should be 0. |
| 153 if (format[2] == 'd') { |
| 154 if (reg == 0) return 4; |
| 155 PrintRegister(reg); |
| 156 return 3; |
| 157 } else { |
| 158 PrintRegister(reg); |
| 159 return 2; |
| 160 } |
| 161 } else if (format[1] == '3') { // 'r3: register resides in bit 16-19 |
| 162 RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr); |
| 163 int reg = rsinstr->B2Value(); |
| 164 PrintRegister(reg); |
| 165 return 2; |
| 166 } else if (format[1] == '4') { // 'r4: register resides in bit 20-23 |
| 167 RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr); |
| 168 int reg = rsinstr->B2Value(); |
| 169 PrintRegister(reg); |
| 170 return 2; |
| 171 } else if (format[1] == '5') { // 'r5: register resides in bit 24-28 |
| 172 RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr); |
| 173 int reg = rreinstr->R1Value(); |
| 174 PrintRegister(reg); |
| 175 return 2; |
| 176 } else if (format[1] == '6') { // 'r6: register resides in bit 29-32 |
| 177 RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr); |
| 178 int reg = rreinstr->R2Value(); |
| 179 PrintRegister(reg); |
| 180 return 2; |
| 181 } else if (format[1] == '7') { // 'r6: register resides in bit 32-35 |
| 182 SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr); |
| 183 int reg = ssinstr->B2Value(); |
| 184 PrintRegister(reg); |
| 185 return 2; |
| 186 } |
| 187 |
| 188 UNREACHABLE(); |
| 189 return -1; |
| 190 } |
| 191 |
| 192 int Decoder::FormatFloatingRegister(Instruction* instr, const char* format) { |
| 193 DCHECK(format[0] == 'f'); |
| 194 |
| 195 // reuse 1, 5 and 6 because it is coresponding |
| 196 if (format[1] == '1') { // 'r1: register resides in bit 8-11 |
| 197 RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr); |
| 198 int reg = rrinstr->R1Value(); |
| 199 PrintDRegister(reg); |
| 200 return 2; |
| 201 } else if (format[1] == '2') { // 'f2: register resides in bit 12-15 |
| 202 RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr); |
| 203 int reg = rrinstr->R2Value(); |
| 204 PrintDRegister(reg); |
| 205 return 2; |
| 206 } else if (format[1] == '3') { // 'f3: register resides in bit 16-19 |
| 207 RRDInstruction* rrdinstr = reinterpret_cast<RRDInstruction*>(instr); |
| 208 int reg = rrdinstr->R1Value(); |
| 209 PrintDRegister(reg); |
| 210 return 2; |
| 211 } else if (format[1] == '5') { // 'f5: register resides in bit 24-28 |
| 212 RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr); |
| 213 int reg = rreinstr->R1Value(); |
| 214 PrintDRegister(reg); |
| 215 return 2; |
| 216 } else if (format[1] == '6') { // 'f6: register resides in bit 29-32 |
| 217 RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr); |
| 218 int reg = rreinstr->R2Value(); |
| 219 PrintDRegister(reg); |
| 220 return 2; |
| 221 } |
| 222 UNREACHABLE(); |
| 223 return -1; |
| 224 } |
| 225 |
| 226 // FormatOption takes a formatting string and interprets it based on |
| 227 // the current instructions. The format string points to the first |
| 228 // character of the option string (the option escape has already been |
| 229 // consumed by the caller.) FormatOption returns the number of |
| 230 // characters that were consumed from the formatting string. |
| 231 int Decoder::FormatOption(Instruction* instr, const char* format) { |
| 232 switch (format[0]) { |
| 233 case 'o': { |
| 234 if (instr->Bit(10) == 1) { |
| 235 Print("o"); |
| 236 } |
| 237 return 1; |
| 238 } |
| 239 case '.': { |
| 240 if (instr->Bit(0) == 1) { |
| 241 Print("."); |
| 242 } else { |
| 243 Print(" "); // ensure consistent spacing |
| 244 } |
| 245 return 1; |
| 246 } |
| 247 case 'r': { |
| 248 return FormatRegister(instr, format); |
| 249 } |
| 250 case 'f': { |
| 251 return FormatFloatingRegister(instr, format); |
| 252 } |
| 253 case 'i': { // int16 |
| 254 return FormatImmediate(instr, format); |
| 255 } |
| 256 case 'u': { // uint16 |
| 257 int32_t value = instr->Bits(15, 0); |
| 258 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 259 return 6; |
| 260 } |
| 261 case 'l': { |
| 262 // Link (LK) Bit 0 |
| 263 if (instr->Bit(0) == 1) { |
| 264 Print("l"); |
| 265 } |
| 266 return 1; |
| 267 } |
| 268 case 'a': { |
| 269 // Absolute Address Bit 1 |
| 270 if (instr->Bit(1) == 1) { |
| 271 Print("a"); |
| 272 } |
| 273 return 1; |
| 274 } |
| 275 case 't': { // 'target: target of branch instructions |
| 276 // target26 or target16 |
| 277 DCHECK(STRING_STARTS_WITH(format, "target")); |
| 278 if ((format[6] == '2') && (format[7] == '6')) { |
| 279 int off = ((instr->Bits(25, 2)) << 8) >> 6; |
| 280 out_buffer_pos_ += SNPrintF( |
| 281 out_buffer_ + out_buffer_pos_, "%+d -> %s", off, |
| 282 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + off)); |
| 283 return 8; |
| 284 } else if ((format[6] == '1') && (format[7] == '6')) { |
| 285 int off = ((instr->Bits(15, 2)) << 18) >> 16; |
| 286 out_buffer_pos_ += SNPrintF( |
| 287 out_buffer_ + out_buffer_pos_, "%+d -> %s", off, |
| 288 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + off)); |
| 289 return 8; |
| 290 } |
| 291 case 'm': { |
| 292 return FormatMask(instr, format); |
| 293 } |
| 294 } |
| 295 case 'd': { // ds value for offset |
| 296 return FormatDisplacement(instr, format); |
| 297 } |
| 298 default: { |
| 299 UNREACHABLE(); |
| 300 break; |
| 301 } |
| 302 } |
| 303 |
| 304 UNREACHABLE(); |
| 305 return -1; |
| 306 } |
| 307 |
| 308 int Decoder::FormatMask(Instruction* instr, const char* format) { |
| 309 DCHECK(format[0] == 'm'); |
| 310 int32_t value = 0; |
| 311 if ((format[1] == '1')) { // prints the mask format in bit 8-12 |
| 312 value = reinterpret_cast<RRInstruction*>(instr)->R1Value(); |
| 313 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", value); |
| 314 return 2; |
| 315 } else if (format[1] == '2') { // mask format in bit 16 - 19 |
| 316 value = reinterpret_cast<RXInstruction*>(instr)->B2Value(); |
| 317 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", value); |
| 318 return 2; |
| 319 } |
| 320 |
| 321 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 322 return 2; |
| 323 } |
| 324 |
| 325 int Decoder::FormatDisplacement(Instruction* instr, const char* format) { |
| 326 DCHECK(format[0] == 'd'); |
| 327 |
| 328 if (format[1] == '1') { // displacement in 20-31 |
| 329 RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr); |
| 330 uint16_t value = rsinstr->D2Value(); |
| 331 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 332 |
| 333 return 2; |
| 334 } else if (format[1] == '2') { // displacement in 20-39 |
| 335 RXYInstruction* rxyinstr = reinterpret_cast<RXYInstruction*>(instr); |
| 336 int32_t value = rxyinstr->D2Value(); |
| 337 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 338 return 2; |
| 339 } else if (format[1] == '4') { // SS displacement 2 36-47 |
| 340 SSInstruction* ssInstr = reinterpret_cast<SSInstruction*>(instr); |
| 341 uint16_t value = ssInstr->D2Value(); |
| 342 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 343 return 2; |
| 344 } else if (format[1] == '3') { // SS displacement 1 20 - 32 |
| 345 SSInstruction* ssInstr = reinterpret_cast<SSInstruction*>(instr); |
| 346 uint16_t value = ssInstr->D1Value(); |
| 347 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 348 return 2; |
| 349 } else { // s390 specific |
| 350 int32_t value = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3); |
| 351 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 352 return 1; |
| 353 } |
| 354 } |
| 355 |
| 356 int Decoder::FormatImmediate(Instruction* instr, const char* format) { |
| 357 DCHECK(format[0] == 'i'); |
| 358 |
| 359 if (format[1] == '1') { // immediate in 16-31 |
| 360 RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr); |
| 361 int16_t value = riinstr->I2Value(); |
| 362 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 363 return 2; |
| 364 } else if (format[1] == '2') { // immediate in 16-48 |
| 365 RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr); |
| 366 int32_t value = rilinstr->I2Value(); |
| 367 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 368 return 2; |
| 369 } else if (format[1] == '3') { // immediate in I format |
| 370 IInstruction* iinstr = reinterpret_cast<IInstruction*>(instr); |
| 371 int8_t value = iinstr->IValue(); |
| 372 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 373 return 2; |
| 374 } else if (format[1] == '4') { // immediate in 16-31, but outputs as offset |
| 375 RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr); |
| 376 int16_t value = riinstr->I2Value() * 2; |
| 377 if (value >= 0) |
| 378 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+"); |
| 379 else |
| 380 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*"); |
| 381 |
| 382 out_buffer_pos_ += SNPrintF( |
| 383 out_buffer_ + out_buffer_pos_, "%d -> %s", value, |
| 384 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + value)); |
| 385 return 2; |
| 386 } else if (format[1] == '5') { // immediate in 16-31, but outputs as offset |
| 387 RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr); |
| 388 int32_t value = rilinstr->I2Value() * 2; |
| 389 if (value >= 0) |
| 390 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+"); |
| 391 else |
| 392 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*"); |
| 393 |
| 394 out_buffer_pos_ += SNPrintF( |
| 395 out_buffer_ + out_buffer_pos_, "%d -> %s", value, |
| 396 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + value)); |
| 397 return 2; |
| 398 } else if (format[1] == '6') { // unsigned immediate in 16-31 |
| 399 RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr); |
| 400 uint16_t value = riinstr->I2UnsignedValue(); |
| 401 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 402 return 2; |
| 403 } else if (format[1] == '7') { // unsigned immediate in 16-47 |
| 404 RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr); |
| 405 uint32_t value = rilinstr->I2UnsignedValue(); |
| 406 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 407 return 2; |
| 408 } else if (format[1] == '8') { // unsigned immediate in 8-15 |
| 409 SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr); |
| 410 uint8_t value = ssinstr->Length(); |
| 411 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 412 return 2; |
| 413 } else if (format[1] == '9') { // unsigned immediate in 16-23 |
| 414 RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr); |
| 415 uint8_t value = rie_instr->I3Value(); |
| 416 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 417 return 2; |
| 418 } else if (format[1] == 'a') { // unsigned immediate in 24-31 |
| 419 RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr); |
| 420 uint8_t value = rie_instr->I4Value(); |
| 421 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 422 return 2; |
| 423 } else if (format[1] == 'b') { // unsigned immediate in 32-39 |
| 424 RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr); |
| 425 uint8_t value = rie_instr->I5Value(); |
| 426 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 427 return 2; |
| 428 } else if (format[1] == 'c') { // signed immediate in 8-15 |
| 429 SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr); |
| 430 int8_t value = ssinstr->Length(); |
| 431 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 432 return 2; |
| 433 } else if (format[1] == 'd') { // signed immediate in 32-47 |
| 434 SILInstruction* silinstr = reinterpret_cast<SILInstruction*>(instr); |
| 435 int16_t value = silinstr->I2Value(); |
| 436 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value); |
| 437 return 2; |
| 438 } else if (format[1] == 'e') { // immediate in 16-47, but outputs as offset |
| 439 RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr); |
| 440 int32_t value = rilinstr->I2Value() * 2; |
| 441 if (value >= 0) |
| 442 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+"); |
| 443 else |
| 444 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*"); |
| 445 |
| 446 out_buffer_pos_ += SNPrintF( |
| 447 out_buffer_ + out_buffer_pos_, "%d -> %s", value, |
| 448 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + value)); |
| 449 return 2; |
| 450 } |
| 451 |
| 452 UNREACHABLE(); |
| 453 return -1; |
| 454 } |
| 455 |
| 456 // Format takes a formatting string for a whole instruction and prints it into |
| 457 // the output buffer. All escaped options are handed to FormatOption to be |
| 458 // parsed further. |
| 459 void Decoder::Format(Instruction* instr, const char* format) { |
| 460 char cur = *format++; |
| 461 while ((cur != 0) && (out_buffer_pos_ < (out_buffer_.length() - 1))) { |
| 462 if (cur == '\'') { // Single quote is used as the formatting escape. |
| 463 format += FormatOption(instr, format); |
| 464 } else { |
| 465 out_buffer_[out_buffer_pos_++] = cur; |
| 466 } |
| 467 cur = *format++; |
| 468 } |
| 469 out_buffer_[out_buffer_pos_] = '\0'; |
| 470 } |
| 471 |
| 472 // The disassembler may end up decoding data inlined in the code. We do not want |
| 473 // it to crash if the data does not ressemble any known instruction. |
| 474 #define VERIFY(condition) \ |
| 475 if (!(condition)) { \ |
| 476 Unknown(instr); \ |
| 477 return; \ |
| 478 } |
| 479 |
| 480 // For currently unimplemented decodings the disassembler calls Unknown(instr) |
| 481 // which will just print "unknown" of the instruction bits. |
| 482 void Decoder::Unknown(Instruction* instr) { Format(instr, "unknown"); } |
| 483 |
| 484 // For currently unimplemented decodings the disassembler calls |
| 485 // UnknownFormat(instr) which will just print opcode name of the |
| 486 // instruction bits. |
| 487 void Decoder::UnknownFormat(Instruction* instr, const char* name) { |
| 488 char buffer[100]; |
| 489 snprintf(buffer, sizeof(buffer), "%s (unknown-format)", name); |
| 490 Format(instr, buffer); |
| 491 } |
| 492 |
| 493 // Disassembles Two Byte S390 Instructions |
| 494 // @return true if successfully decoded |
| 495 bool Decoder::DecodeTwoByte(Instruction* instr) { |
| 496 // Print the Instruction bits. |
| 497 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%04x ", |
| 498 instr->InstructionBits<TwoByteInstr>()); |
| 499 |
| 500 Opcode opcode = instr->S390OpcodeValue(); |
| 501 switch (opcode) { |
| 502 case AR: |
| 503 Format(instr, "ar\t'r1,'r2"); |
| 504 break; |
| 505 case SR: |
| 506 Format(instr, "sr\t'r1,'r2"); |
| 507 break; |
| 508 case MR: |
| 509 Format(instr, "mr\t'r1,'r2"); |
| 510 break; |
| 511 case DR: |
| 512 Format(instr, "dr\t'r1,'r2"); |
| 513 break; |
| 514 case OR: |
| 515 Format(instr, "or\t'r1,'r2"); |
| 516 break; |
| 517 case NR: |
| 518 Format(instr, "nr\t'r1,'r2"); |
| 519 break; |
| 520 case XR: |
| 521 Format(instr, "xr\t'r1,'r2"); |
| 522 break; |
| 523 case LR: |
| 524 Format(instr, "lr\t'r1,'r2"); |
| 525 break; |
| 526 case CR: |
| 527 Format(instr, "cr\t'r1,'r2"); |
| 528 break; |
| 529 case CLR: |
| 530 Format(instr, "clr\t'r1,'r2"); |
| 531 break; |
| 532 case BCR: |
| 533 Format(instr, "bcr\t'm1,'r2"); |
| 534 break; |
| 535 case LTR: |
| 536 Format(instr, "ltr\t'r1,'r2"); |
| 537 break; |
| 538 case ALR: |
| 539 Format(instr, "alr\t'r1,'r2"); |
| 540 break; |
| 541 case SLR: |
| 542 Format(instr, "slr\t'r1,'r2"); |
| 543 break; |
| 544 case LNR: |
| 545 Format(instr, "lnr\t'r1,'r2"); |
| 546 break; |
| 547 case LCR: |
| 548 Format(instr, "lcr\t'r1,'r2"); |
| 549 break; |
| 550 case BASR: |
| 551 Format(instr, "basr\t'r1,'r2"); |
| 552 break; |
| 553 case LDR: |
| 554 Format(instr, "ldr\t'f1,'f2"); |
| 555 break; |
| 556 case BKPT: |
| 557 Format(instr, "bkpt"); |
| 558 break; |
| 559 default: |
| 560 return false; |
| 561 } |
| 562 return true; |
| 563 } |
| 564 |
| 565 // Disassembles Four Byte S390 Instructions |
| 566 // @return true if successfully decoded |
| 567 bool Decoder::DecodeFourByte(Instruction* instr) { |
| 568 // Print the Instruction bits. |
| 569 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%08x ", |
| 570 instr->InstructionBits<FourByteInstr>()); |
| 571 |
| 572 Opcode opcode = instr->S390OpcodeValue(); |
| 573 switch (opcode) { |
| 574 case AHI: |
| 575 Format(instr, "ahi\t'r1,'i1"); |
| 576 break; |
| 577 case AGHI: |
| 578 Format(instr, "aghi\t'r1,'i1"); |
| 579 break; |
| 580 case LHI: |
| 581 Format(instr, "lhi\t'r1,'i1"); |
| 582 break; |
| 583 case LGHI: |
| 584 Format(instr, "lghi\t'r1,'i1"); |
| 585 break; |
| 586 case MHI: |
| 587 Format(instr, "mhi\t'r1,'i1"); |
| 588 break; |
| 589 case MGHI: |
| 590 Format(instr, "mghi\t'r1,'i1"); |
| 591 break; |
| 592 case CHI: |
| 593 Format(instr, "chi\t'r1,'i1"); |
| 594 break; |
| 595 case CGHI: |
| 596 Format(instr, "cghi\t'r1,'i1"); |
| 597 break; |
| 598 case BRAS: |
| 599 Format(instr, "bras\t'r1,'i1"); |
| 600 break; |
| 601 case BRC: |
| 602 Format(instr, "brc\t'm1,'i4"); |
| 603 break; |
| 604 case BRCT: |
| 605 Format(instr, "brct\t'r1,'i4"); |
| 606 break; |
| 607 case BRCTG: |
| 608 Format(instr, "brctg\t'r1,'i4"); |
| 609 break; |
| 610 case IIHH: |
| 611 Format(instr, "iihh\t'r1,'i1"); |
| 612 break; |
| 613 case IIHL: |
| 614 Format(instr, "iihl\t'r1,'i1"); |
| 615 break; |
| 616 case IILH: |
| 617 Format(instr, "iilh\t'r1,'i1"); |
| 618 break; |
| 619 case IILL: |
| 620 Format(instr, "iill\t'r1,'i1"); |
| 621 break; |
| 622 case OILL: |
| 623 Format(instr, "oill\t'r1,'i1"); |
| 624 break; |
| 625 case TMLL: |
| 626 Format(instr, "tmll\t'r1,'i1"); |
| 627 break; |
| 628 case STM: |
| 629 Format(instr, "stm\t'r1,'r2,'d1('r3)"); |
| 630 break; |
| 631 case LM: |
| 632 Format(instr, "lm\t'r1,'r2,'d1('r3)"); |
| 633 break; |
| 634 case SLL: |
| 635 Format(instr, "sll\t'r1,'d1('r3)"); |
| 636 break; |
| 637 case SRL: |
| 638 Format(instr, "srl\t'r1,'d1('r3)"); |
| 639 break; |
| 640 case SLA: |
| 641 Format(instr, "sla\t'r1,'d1('r3)"); |
| 642 break; |
| 643 case SRA: |
| 644 Format(instr, "sra\t'r1,'d1('r3)"); |
| 645 break; |
| 646 case AGR: |
| 647 Format(instr, "agr\t'r5,'r6"); |
| 648 break; |
| 649 case AGFR: |
| 650 Format(instr, "agfr\t'r5,'r6"); |
| 651 break; |
| 652 case ARK: |
| 653 Format(instr, "ark\t'r5,'r6,'r3"); |
| 654 break; |
| 655 case AGRK: |
| 656 Format(instr, "agrk\t'r5,'r6,'r3"); |
| 657 break; |
| 658 case SGR: |
| 659 Format(instr, "sgr\t'r5,'r6"); |
| 660 break; |
| 661 case SGFR: |
| 662 Format(instr, "sgfr\t'r5,'r6"); |
| 663 break; |
| 664 case SRK: |
| 665 Format(instr, "srk\t'r5,'r6,'r3"); |
| 666 break; |
| 667 case SGRK: |
| 668 Format(instr, "sgrk\t'r5,'r6,'r3"); |
| 669 break; |
| 670 case NGR: |
| 671 Format(instr, "ngr\t'r5,'r6"); |
| 672 break; |
| 673 case NRK: |
| 674 Format(instr, "nrk\t'r5,'r6,'r3"); |
| 675 break; |
| 676 case NGRK: |
| 677 Format(instr, "ngrk\t'r5,'r6,'r3"); |
| 678 break; |
| 679 case NILL: |
| 680 Format(instr, "nill\t'r1,'i1"); |
| 681 break; |
| 682 case NILH: |
| 683 Format(instr, "nilh\t'r1,'i1"); |
| 684 break; |
| 685 case OGR: |
| 686 Format(instr, "ogr\t'r5,'r6"); |
| 687 break; |
| 688 case ORK: |
| 689 Format(instr, "ork\t'r5,'r6,'r3"); |
| 690 break; |
| 691 case OGRK: |
| 692 Format(instr, "ogrk\t'r5,'r6,'r3"); |
| 693 break; |
| 694 case XGR: |
| 695 Format(instr, "xgr\t'r5,'r6"); |
| 696 break; |
| 697 case XRK: |
| 698 Format(instr, "xrk\t'r5,'r6,'r3"); |
| 699 break; |
| 700 case XGRK: |
| 701 Format(instr, "xgrk\t'r5,'r6,'r3"); |
| 702 break; |
| 703 case CGR: |
| 704 Format(instr, "cgr\t'r5,'r6"); |
| 705 break; |
| 706 case CLGR: |
| 707 Format(instr, "clgr\t'r5,'r6"); |
| 708 break; |
| 709 case LLGFR: |
| 710 Format(instr, "llgfr\t'r5,'r6"); |
| 711 break; |
| 712 case LBR: |
| 713 Format(instr, "lbr\t'r5,'r6"); |
| 714 break; |
| 715 case LEDBR: |
| 716 Format(instr, "ledbr\t'f5,'f6"); |
| 717 break; |
| 718 case LDEBR: |
| 719 Format(instr, "ldebr\t'f5,'f6"); |
| 720 break; |
| 721 case LTGR: |
| 722 Format(instr, "ltgr\t'r5,'r6"); |
| 723 break; |
| 724 case LTDBR: |
| 725 Format(instr, "ltdbr\t'f5,'f6"); |
| 726 break; |
| 727 case LTEBR: |
| 728 Format(instr, "ltebr\t'f5,'f6"); |
| 729 break; |
| 730 case LGR: |
| 731 Format(instr, "lgr\t'r5,'r6"); |
| 732 break; |
| 733 case LGDR: |
| 734 Format(instr, "lgdr\t'r5,'f6"); |
| 735 break; |
| 736 case LGFR: |
| 737 Format(instr, "lgfr\t'r5,'r6"); |
| 738 break; |
| 739 case LTGFR: |
| 740 Format(instr, "ltgfr\t'r5,'r6"); |
| 741 break; |
| 742 case LCGR: |
| 743 Format(instr, "lcgr\t'r5,'r6"); |
| 744 break; |
| 745 case MSR: |
| 746 Format(instr, "msr\t'r5,'r6"); |
| 747 break; |
| 748 case LGBR: |
| 749 Format(instr, "lgbr\t'r5,'r6"); |
| 750 break; |
| 751 case LGHR: |
| 752 Format(instr, "lghr\t'r5,'r6"); |
| 753 break; |
| 754 case MSGR: |
| 755 Format(instr, "msgr\t'r5,'r6"); |
| 756 break; |
| 757 case DSGR: |
| 758 Format(instr, "dsgr\t'r5,'r6"); |
| 759 break; |
| 760 case LZDR: |
| 761 Format(instr, "lzdr\t'f5"); |
| 762 break; |
| 763 case MLR: |
| 764 Format(instr, "mlr\t'r5,'r6"); |
| 765 break; |
| 766 case MLGR: |
| 767 Format(instr, "mlgr\t'r5,'r6"); |
| 768 break; |
| 769 case ALGR: |
| 770 Format(instr, "algr\t'r5,'r6"); |
| 771 break; |
| 772 case ALRK: |
| 773 Format(instr, "alrk\t'r5,'r6,'r3"); |
| 774 break; |
| 775 case ALGRK: |
| 776 Format(instr, "algrk\t'r5,'r6,'r3"); |
| 777 break; |
| 778 case SLGR: |
| 779 Format(instr, "slgr\t'r5,'r6"); |
| 780 break; |
| 781 case DLR: |
| 782 Format(instr, "dlr\t'r1,'r2"); |
| 783 break; |
| 784 case DLGR: |
| 785 Format(instr, "dlgr\t'r5,'r6"); |
| 786 break; |
| 787 case SLRK: |
| 788 Format(instr, "slrk\t'r5,'r6,'r3"); |
| 789 break; |
| 790 case SLGRK: |
| 791 Format(instr, "slgrk\t'r5,'r6,'r3"); |
| 792 break; |
| 793 case LHR: |
| 794 Format(instr, "lhr\t'r5,'r6"); |
| 795 break; |
| 796 case LLHR: |
| 797 Format(instr, "llhr\t'r5,'r6"); |
| 798 break; |
| 799 case LLGHR: |
| 800 Format(instr, "llghr\t'r5,'r6"); |
| 801 break; |
| 802 case LNGR: |
| 803 Format(instr, "lngr\t'r5,'r6"); |
| 804 break; |
| 805 case A: |
| 806 Format(instr, "a\t'r1,'d1('r2d,'r3)"); |
| 807 break; |
| 808 case S: |
| 809 Format(instr, "s\t'r1,'d1('r2d,'r3)"); |
| 810 break; |
| 811 case M: |
| 812 Format(instr, "m\t'r1,'d1('r2d,'r3)"); |
| 813 break; |
| 814 case D: |
| 815 Format(instr, "d\t'r1,'d1('r2d,'r3)"); |
| 816 break; |
| 817 case O: |
| 818 Format(instr, "o\t'r1,'d1('r2d,'r3)"); |
| 819 break; |
| 820 case N: |
| 821 Format(instr, "n\t'r1,'d1('r2d,'r3)"); |
| 822 break; |
| 823 case L: |
| 824 Format(instr, "l\t'r1,'d1('r2d,'r3)"); |
| 825 break; |
| 826 case C: |
| 827 Format(instr, "c\t'r1,'d1('r2d,'r3)"); |
| 828 break; |
| 829 case AH: |
| 830 Format(instr, "ah\t'r1,'d1('r2d,'r3)"); |
| 831 break; |
| 832 case SH: |
| 833 Format(instr, "sh\t'r1,'d1('r2d,'r3)"); |
| 834 break; |
| 835 case MH: |
| 836 Format(instr, "mh\t'r1,'d1('r2d,'r3)"); |
| 837 break; |
| 838 case AL: |
| 839 Format(instr, "al\t'r1,'d1('r2d,'r3)"); |
| 840 break; |
| 841 case SL: |
| 842 Format(instr, "sl\t'r1,'d1('r2d,'r3)"); |
| 843 break; |
| 844 case LA: |
| 845 Format(instr, "la\t'r1,'d1('r2d,'r3)"); |
| 846 break; |
| 847 case CH: |
| 848 Format(instr, "ch\t'r1,'d1('r2d,'r3)"); |
| 849 break; |
| 850 case CL: |
| 851 Format(instr, "cl\t'r1,'d1('r2d,'r3)"); |
| 852 break; |
| 853 case CLI: |
| 854 Format(instr, "cli\t'd1('r3),'i8"); |
| 855 break; |
| 856 case TM: |
| 857 Format(instr, "tm\t'd1('r3),'i8"); |
| 858 break; |
| 859 case BC: |
| 860 Format(instr, "bc\t'm1,'d1('r2d,'r3)"); |
| 861 break; |
| 862 case BCT: |
| 863 Format(instr, "bct\t'r1,'d1('r2d,'r3)"); |
| 864 break; |
| 865 case ST: |
| 866 Format(instr, "st\t'r1,'d1('r2d,'r3)"); |
| 867 break; |
| 868 case STC: |
| 869 Format(instr, "stc\t'r1,'d1('r2d,'r3)"); |
| 870 break; |
| 871 case IC_z: |
| 872 Format(instr, "ic\t'r1,'d1('r2d,'r3)"); |
| 873 break; |
| 874 case LD: |
| 875 Format(instr, "ld\t'f1,'d1('r2d,'r3)"); |
| 876 break; |
| 877 case LE: |
| 878 Format(instr, "le\t'f1,'d1('r2d,'r3)"); |
| 879 break; |
| 880 case LDGR: |
| 881 Format(instr, "ldgr\t'f5,'r6"); |
| 882 break; |
| 883 case STE: |
| 884 Format(instr, "ste\t'f1,'d1('r2d,'r3)"); |
| 885 break; |
| 886 case STD: |
| 887 Format(instr, "std\t'f1,'d1('r2d,'r3)"); |
| 888 break; |
| 889 case CFDBR: |
| 890 Format(instr, "cfdbr\t'r5,'m2,'f6"); |
| 891 break; |
| 892 case CDFBR: |
| 893 Format(instr, "cdfbr\t'f5,'m2,'r6"); |
| 894 break; |
| 895 case CFEBR: |
| 896 Format(instr, "cfebr\t'r5,'m2,'f6"); |
| 897 break; |
| 898 case CEFBR: |
| 899 Format(instr, "cefbr\t'f5,'m2,'r6"); |
| 900 break; |
| 901 case CGEBR: |
| 902 Format(instr, "cgebr\t'r5,'m2,'f6"); |
| 903 break; |
| 904 case CGDBR: |
| 905 Format(instr, "cgdbr\t'r5,'m2,'f6"); |
| 906 break; |
| 907 case CEGBR: |
| 908 Format(instr, "cegbr\t'f5,'m2,'r6"); |
| 909 break; |
| 910 case CDGBR: |
| 911 Format(instr, "cdgbr\t'f5,'m2,'r6"); |
| 912 break; |
| 913 case CDLFBR: |
| 914 Format(instr, "cdlfbr\t'f5,'m2,'r6"); |
| 915 break; |
| 916 case CDLGBR: |
| 917 Format(instr, "cdlgbr\t'f5,'m2,'r6"); |
| 918 break; |
| 919 case CELGBR: |
| 920 Format(instr, "celgbr\t'f5,'m2,'r6"); |
| 921 break; |
| 922 case CLFDBR: |
| 923 Format(instr, "clfdbr\t'r5,'m2,'f6"); |
| 924 break; |
| 925 case CLGDBR: |
| 926 Format(instr, "clgdbr\t'r5,'m2,'f6"); |
| 927 break; |
| 928 case AEBR: |
| 929 Format(instr, "aebr\t'f5,'f6"); |
| 930 break; |
| 931 case SEBR: |
| 932 Format(instr, "sebr\t'f5,'f6"); |
| 933 break; |
| 934 case MEEBR: |
| 935 Format(instr, "meebr\t'f5,'f6"); |
| 936 break; |
| 937 case DEBR: |
| 938 Format(instr, "debr\t'f5,'f6"); |
| 939 break; |
| 940 case ADBR: |
| 941 Format(instr, "adbr\t'f5,'f6"); |
| 942 break; |
| 943 case SDBR: |
| 944 Format(instr, "sdbr\t'f5,'f6"); |
| 945 break; |
| 946 case MDBR: |
| 947 Format(instr, "mdbr\t'f5,'f6"); |
| 948 break; |
| 949 case DDBR: |
| 950 Format(instr, "ddbr\t'f5,'f6"); |
| 951 break; |
| 952 case CDBR: |
| 953 Format(instr, "cdbr\t'f5,'f6"); |
| 954 break; |
| 955 case SQDBR: |
| 956 Format(instr, "sqdbr\t'f5,'f6"); |
| 957 break; |
| 958 case LCDBR: |
| 959 Format(instr, "lcdbr\t'f5,'f6"); |
| 960 break; |
| 961 case STH: |
| 962 Format(instr, "sth\t'r1,'d1('r2d,'r3)"); |
| 963 break; |
| 964 case SRDA: |
| 965 Format(instr, "srda\t'r1,'d1"); |
| 966 break; |
| 967 case SRDL: |
| 968 Format(instr, "srdl\t'r1,'d1"); |
| 969 break; |
| 970 case MADBR: |
| 971 Format(instr, "madbr\t'f3,'f5,'f6"); |
| 972 break; |
| 973 case MSDBR: |
| 974 Format(instr, "msdbr\t'f3,'f5,'f6"); |
| 975 break; |
| 976 case FLOGR: |
| 977 Format(instr, "flogr\t'r5,'r6"); |
| 978 break; |
| 979 // TRAP4 is used in calling to native function. it will not be generated |
| 980 // in native code. |
| 981 case TRAP4: { |
| 982 Format(instr, "trap4"); |
| 983 break; |
| 984 } |
| 985 default: |
| 986 return false; |
| 987 } |
| 988 return true; |
| 989 } |
| 990 |
| 991 // Disassembles Six Byte S390 Instructions |
| 992 // @return true if successfully decoded |
| 993 bool Decoder::DecodeSixByte(Instruction* instr) { |
| 994 // Print the Instruction bits. |
| 995 out_buffer_pos_ += |
| 996 SNPrintF(out_buffer_ + out_buffer_pos_, "%012" PRIx64 " ", |
| 997 instr->InstructionBits<SixByteInstr>()); |
| 998 |
| 999 Opcode opcode = instr->S390OpcodeValue(); |
| 1000 switch (opcode) { |
| 1001 case LLILF: |
| 1002 Format(instr, "llilf\t'r1,'i7"); |
| 1003 break; |
| 1004 case LLIHF: |
| 1005 Format(instr, "llihf\t'r1,'i7"); |
| 1006 break; |
| 1007 case AFI: |
| 1008 Format(instr, "afi\t'r1,'i7"); |
| 1009 break; |
| 1010 case ASI: |
| 1011 Format(instr, "asi\t'd2('r3),'ic"); |
| 1012 break; |
| 1013 case AGSI: |
| 1014 Format(instr, "agsi\t'd2('r3),'ic"); |
| 1015 break; |
| 1016 case ALFI: |
| 1017 Format(instr, "alfi\t'r1,'i7"); |
| 1018 break; |
| 1019 case AHIK: |
| 1020 Format(instr, "ahik\t'r1,'r2,'i1"); |
| 1021 break; |
| 1022 case AGHIK: |
| 1023 Format(instr, "aghik\t'r1,'r2,'i1"); |
| 1024 break; |
| 1025 case CLGFI: |
| 1026 Format(instr, "clgfi\t'r1,'i7"); |
| 1027 break; |
| 1028 case CLFI: |
| 1029 Format(instr, "clfi\t'r1,'i7"); |
| 1030 break; |
| 1031 case CFI: |
| 1032 Format(instr, "cfi\t'r1,'i2"); |
| 1033 break; |
| 1034 case CGFI: |
| 1035 Format(instr, "cgfi\t'r1,'i2"); |
| 1036 break; |
| 1037 case BRASL: |
| 1038 Format(instr, "brasl\t'r1,'ie"); |
| 1039 break; |
| 1040 case BRCL: |
| 1041 Format(instr, "brcl\t'm1,'i5"); |
| 1042 break; |
| 1043 case IIHF: |
| 1044 Format(instr, "iihf\t'r1,'i7"); |
| 1045 break; |
| 1046 case IILF: |
| 1047 Format(instr, "iilf\t'r1,'i7"); |
| 1048 break; |
| 1049 case XIHF: |
| 1050 Format(instr, "xihf\t'r1,'i7"); |
| 1051 break; |
| 1052 case XILF: |
| 1053 Format(instr, "xilf\t'r1,'i7"); |
| 1054 break; |
| 1055 case SLLK: |
| 1056 Format(instr, "sllk\t'r1,'r2,'d2('r3)"); |
| 1057 break; |
| 1058 case SLLG: |
| 1059 Format(instr, "sllg\t'r1,'r2,'d2('r3)"); |
| 1060 break; |
| 1061 case RLL: |
| 1062 Format(instr, "rll\t'r1,'r2,'d2('r3)"); |
| 1063 break; |
| 1064 case RLLG: |
| 1065 Format(instr, "rllg\t'r1,'r2,'d2('r3)"); |
| 1066 break; |
| 1067 case SRLK: |
| 1068 Format(instr, "srlk\t'r1,'r2,'d2('r3)"); |
| 1069 break; |
| 1070 case SRLG: |
| 1071 Format(instr, "srlg\t'r1,'r2,'d2('r3)"); |
| 1072 break; |
| 1073 case SLAK: |
| 1074 Format(instr, "slak\t'r1,'r2,'d2('r3)"); |
| 1075 break; |
| 1076 case SLAG: |
| 1077 Format(instr, "slag\t'r1,'r2,'d2('r3)"); |
| 1078 break; |
| 1079 case SRAK: |
| 1080 Format(instr, "srak\t'r1,'r2,'d2('r3)"); |
| 1081 break; |
| 1082 case SRAG: |
| 1083 Format(instr, "srag\t'r1,'r2,'d2('r3)"); |
| 1084 break; |
| 1085 case RISBG: |
| 1086 Format(instr, "risbg\t'r1,'r2,'i9,'ia,'ib"); |
| 1087 break; |
| 1088 case RISBGN: |
| 1089 Format(instr, "risbgn\t'r1,'r2,'i9,'ia,'ib"); |
| 1090 break; |
| 1091 case LMY: |
| 1092 Format(instr, "lmy\t'r1,'r2,'d2('r3)"); |
| 1093 break; |
| 1094 case LMG: |
| 1095 Format(instr, "lmg\t'r1,'r2,'d2('r3)"); |
| 1096 break; |
| 1097 case STMY: |
| 1098 Format(instr, "stmy\t'r1,'r2,'d2('r3)"); |
| 1099 break; |
| 1100 case STMG: |
| 1101 Format(instr, "stmg\t'r1,'r2,'d2('r3)"); |
| 1102 break; |
| 1103 case LT: |
| 1104 Format(instr, "lt\t'r1,'d2('r2d,'r3)"); |
| 1105 break; |
| 1106 case LTG: |
| 1107 Format(instr, "ltg\t'r1,'d2('r2d,'r3)"); |
| 1108 break; |
| 1109 case ML: |
| 1110 Format(instr, "ml\t'r1,'d2('r2d,'r3)"); |
| 1111 break; |
| 1112 case AY: |
| 1113 Format(instr, "ay\t'r1,'d2('r2d,'r3)"); |
| 1114 break; |
| 1115 case SY: |
| 1116 Format(instr, "sy\t'r1,'d2('r2d,'r3)"); |
| 1117 break; |
| 1118 case NY: |
| 1119 Format(instr, "ny\t'r1,'d2('r2d,'r3)"); |
| 1120 break; |
| 1121 case OY: |
| 1122 Format(instr, "oy\t'r1,'d2('r2d,'r3)"); |
| 1123 break; |
| 1124 case XY: |
| 1125 Format(instr, "xy\t'r1,'d2('r2d,'r3)"); |
| 1126 break; |
| 1127 case CY: |
| 1128 Format(instr, "cy\t'r1,'d2('r2d,'r3)"); |
| 1129 break; |
| 1130 case AHY: |
| 1131 Format(instr, "ahy\t'r1,'d2('r2d,'r3)"); |
| 1132 break; |
| 1133 case SHY: |
| 1134 Format(instr, "shy\t'r1,'d2('r2d,'r3)"); |
| 1135 break; |
| 1136 case LGH: |
| 1137 Format(instr, "lgh\t'r1,'d2('r2d,'r3)"); |
| 1138 break; |
| 1139 case AG: |
| 1140 Format(instr, "ag\t'r1,'d2('r2d,'r3)"); |
| 1141 break; |
| 1142 case AGF: |
| 1143 Format(instr, "agf\t'r1,'d2('r2d,'r3)"); |
| 1144 break; |
| 1145 case SG: |
| 1146 Format(instr, "sg\t'r1,'d2('r2d,'r3)"); |
| 1147 break; |
| 1148 case NG: |
| 1149 Format(instr, "ng\t'r1,'d2('r2d,'r3)"); |
| 1150 break; |
| 1151 case OG: |
| 1152 Format(instr, "og\t'r1,'d2('r2d,'r3)"); |
| 1153 break; |
| 1154 case XG: |
| 1155 Format(instr, "xg\t'r1,'d2('r2d,'r3)"); |
| 1156 break; |
| 1157 case CG: |
| 1158 Format(instr, "cg\t'r1,'d2('r2d,'r3)"); |
| 1159 break; |
| 1160 case LB: |
| 1161 Format(instr, "lb\t'r1,'d2('r2d,'r3)"); |
| 1162 break; |
| 1163 case LG: |
| 1164 Format(instr, "lg\t'r1,'d2('r2d,'r3)"); |
| 1165 break; |
| 1166 case LGF: |
| 1167 Format(instr, "lgf\t'r1,'d2('r2d,'r3)"); |
| 1168 break; |
| 1169 case LLGF: |
| 1170 Format(instr, "llgf\t'r1,'d2('r2d,'r3)"); |
| 1171 break; |
| 1172 case LY: |
| 1173 Format(instr, "ly\t'r1,'d2('r2d,'r3)"); |
| 1174 break; |
| 1175 case ALY: |
| 1176 Format(instr, "aly\t'r1,'d2('r2d,'r3)"); |
| 1177 break; |
| 1178 case ALG: |
| 1179 Format(instr, "alg\t'r1,'d2('r2d,'r3)"); |
| 1180 break; |
| 1181 case SLG: |
| 1182 Format(instr, "slg\t'r1,'d2('r2d,'r3)"); |
| 1183 break; |
| 1184 case SGF: |
| 1185 Format(instr, "sgf\t'r1,'d2('r2d,'r3)"); |
| 1186 break; |
| 1187 case SLY: |
| 1188 Format(instr, "sly\t'r1,'d2('r2d,'r3)"); |
| 1189 break; |
| 1190 case LLH: |
| 1191 Format(instr, "llh\t'r1,'d2('r2d,'r3)"); |
| 1192 break; |
| 1193 case LLGH: |
| 1194 Format(instr, "llgh\t'r1,'d2('r2d,'r3)"); |
| 1195 break; |
| 1196 case LLC: |
| 1197 Format(instr, "llc\t'r1,'d2('r2d,'r3)"); |
| 1198 break; |
| 1199 case LLGC: |
| 1200 Format(instr, "llgc\t'r1,'d2('r2d,'r3)"); |
| 1201 break; |
| 1202 case LDEB: |
| 1203 Format(instr, "ldeb\t'f1,'d2('r2d,'r3)"); |
| 1204 break; |
| 1205 case LAY: |
| 1206 Format(instr, "lay\t'r1,'d2('r2d,'r3)"); |
| 1207 break; |
| 1208 case LARL: |
| 1209 Format(instr, "larl\t'r1,'i5"); |
| 1210 break; |
| 1211 case LGB: |
| 1212 Format(instr, "lgb\t'r1,'d2('r2d,'r3)"); |
| 1213 break; |
| 1214 case CHY: |
| 1215 Format(instr, "chy\t'r1,'d2('r2d,'r3)"); |
| 1216 break; |
| 1217 case CLY: |
| 1218 Format(instr, "cly\t'r1,'d2('r2d,'r3)"); |
| 1219 break; |
| 1220 case CLIY: |
| 1221 Format(instr, "cliy\t'd2('r3),'i8"); |
| 1222 break; |
| 1223 case TMY: |
| 1224 Format(instr, "tmy\t'd2('r3),'i8"); |
| 1225 break; |
| 1226 case CLG: |
| 1227 Format(instr, "clg\t'r1,'d2('r2d,'r3)"); |
| 1228 break; |
| 1229 case BCTG: |
| 1230 Format(instr, "bctg\t'r1,'d2('r2d,'r3)"); |
| 1231 break; |
| 1232 case STY: |
| 1233 Format(instr, "sty\t'r1,'d2('r2d,'r3)"); |
| 1234 break; |
| 1235 case STG: |
| 1236 Format(instr, "stg\t'r1,'d2('r2d,'r3)"); |
| 1237 break; |
| 1238 case ICY: |
| 1239 Format(instr, "icy\t'r1,'d2('r2d,'r3)"); |
| 1240 break; |
| 1241 case MVC: |
| 1242 Format(instr, "mvc\t'd3('i8,'r3),'d4('r7)"); |
| 1243 break; |
| 1244 case MVHI: |
| 1245 Format(instr, "mvhi\t'd3('r3),'id"); |
| 1246 break; |
| 1247 case MVGHI: |
| 1248 Format(instr, "mvghi\t'd3('r3),'id"); |
| 1249 break; |
| 1250 case ALGFI: |
| 1251 Format(instr, "algfi\t'r1,'i7"); |
| 1252 break; |
| 1253 case SLGFI: |
| 1254 Format(instr, "slgfi\t'r1,'i7"); |
| 1255 break; |
| 1256 case SLFI: |
| 1257 Format(instr, "slfi\t'r1,'i7"); |
| 1258 break; |
| 1259 case NIHF: |
| 1260 Format(instr, "nihf\t'r1,'i7"); |
| 1261 break; |
| 1262 case NILF: |
| 1263 Format(instr, "nilf\t'r1,'i7"); |
| 1264 break; |
| 1265 case OIHF: |
| 1266 Format(instr, "oihf\t'r1,'i7"); |
| 1267 break; |
| 1268 case OILF: |
| 1269 Format(instr, "oilf\t'r1,'i7"); |
| 1270 break; |
| 1271 case MSFI: |
| 1272 Format(instr, "msfi\t'r1,'i7"); |
| 1273 break; |
| 1274 case MSGFI: |
| 1275 Format(instr, "msgfi\t'r1,'i7"); |
| 1276 break; |
| 1277 case LDY: |
| 1278 Format(instr, "ldy\t'f1,'d2('r2d,'r3)"); |
| 1279 break; |
| 1280 case LEY: |
| 1281 Format(instr, "ley\t'f1,'d2('r2d,'r3)"); |
| 1282 break; |
| 1283 case STEY: |
| 1284 Format(instr, "stey\t'f1,'d2('r2d,'r3)"); |
| 1285 break; |
| 1286 case STDY: |
| 1287 Format(instr, "stdy\t'f1,'d2('r2d,'r3)"); |
| 1288 break; |
| 1289 case ADB: |
| 1290 Format(instr, "adb\t'r1,'d1('r2d, 'r3)"); |
| 1291 break; |
| 1292 case SDB: |
| 1293 Format(instr, "sdb\t'r1,'d1('r2d, 'r3)"); |
| 1294 break; |
| 1295 case MDB: |
| 1296 Format(instr, "mdb\t'r1,'d1('r2d, 'r3)"); |
| 1297 break; |
| 1298 case DDB: |
| 1299 Format(instr, "ddb\t'r1,'d1('r2d, 'r3)"); |
| 1300 break; |
| 1301 case SQDB: |
| 1302 Format(instr, "sqdb\t'r1,'d1('r2d, 'r3)"); |
| 1303 break; |
| 1304 default: |
| 1305 return false; |
| 1306 } |
| 1307 return true; |
| 1308 } |
| 1309 |
| 1310 #undef VERIFIY |
| 1311 |
| 1312 // Disassemble the instruction at *instr_ptr into the output buffer. |
| 1313 int Decoder::InstructionDecode(byte* instr_ptr) { |
| 1314 Instruction* instr = Instruction::At(instr_ptr); |
| 1315 int instrLength = instr->InstructionLength(); |
| 1316 |
| 1317 if (2 == instrLength) |
| 1318 DecodeTwoByte(instr); |
| 1319 else if (4 == instrLength) |
| 1320 DecodeFourByte(instr); |
| 1321 else |
| 1322 DecodeSixByte(instr); |
| 1323 |
| 1324 return instrLength; |
| 1325 } |
| 1326 |
| 1327 } // namespace internal |
| 1328 } // namespace v8 |
| 1329 |
| 1330 //------------------------------------------------------------------------------ |
| 1331 |
| 1332 namespace disasm { |
| 1333 |
| 1334 const char* NameConverter::NameOfAddress(byte* addr) const { |
| 1335 v8::internal::SNPrintF(tmp_buffer_, "%p", addr); |
| 1336 return tmp_buffer_.start(); |
| 1337 } |
| 1338 |
| 1339 const char* NameConverter::NameOfConstant(byte* addr) const { |
| 1340 return NameOfAddress(addr); |
| 1341 } |
| 1342 |
| 1343 const char* NameConverter::NameOfCPURegister(int reg) const { |
| 1344 return v8::internal::Register::from_code(reg).ToString(); |
| 1345 } |
| 1346 |
| 1347 const char* NameConverter::NameOfByteCPURegister(int reg) const { |
| 1348 UNREACHABLE(); // S390 does not have the concept of a byte register |
| 1349 return "nobytereg"; |
| 1350 } |
| 1351 |
| 1352 const char* NameConverter::NameOfXMMRegister(int reg) const { |
| 1353 // S390 does not have XMM register |
| 1354 // TODO(joransiu): Consider update this for Vector Regs |
| 1355 UNREACHABLE(); |
| 1356 return "noxmmreg"; |
| 1357 } |
| 1358 |
| 1359 const char* NameConverter::NameInCode(byte* addr) const { |
| 1360 // The default name converter is called for unknown code. So we will not try |
| 1361 // to access any memory. |
| 1362 return ""; |
| 1363 } |
| 1364 |
| 1365 //------------------------------------------------------------------------------ |
| 1366 |
| 1367 Disassembler::Disassembler(const NameConverter& converter) |
| 1368 : converter_(converter) {} |
| 1369 |
| 1370 Disassembler::~Disassembler() {} |
| 1371 |
| 1372 int Disassembler::InstructionDecode(v8::internal::Vector<char> buffer, |
| 1373 byte* instruction) { |
| 1374 v8::internal::Decoder d(converter_, buffer); |
| 1375 return d.InstructionDecode(instruction); |
| 1376 } |
| 1377 |
| 1378 // The S390 assembler does not currently use constant pools. |
| 1379 int Disassembler::ConstantPoolSizeAt(byte* instruction) { return -1; } |
| 1380 |
| 1381 void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) { |
| 1382 NameConverter converter; |
| 1383 Disassembler d(converter); |
| 1384 for (byte* pc = begin; pc < end;) { |
| 1385 v8::internal::EmbeddedVector<char, 128> buffer; |
| 1386 buffer[0] = '\0'; |
| 1387 byte* prev_pc = pc; |
| 1388 pc += d.InstructionDecode(buffer, pc); |
| 1389 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc, |
| 1390 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
| 1391 } |
| 1392 } |
| 1393 |
| 1394 } // namespace disasm |
| 1395 |
| 1396 #endif // V8_TARGET_ARCH_S390 |
OLD | NEW |