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Unified Diff: runtime/vm/intermediate_language_x64.cc

Issue 172293004: Explicit conversions for Float32 array loads/stores. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: fixed ARM register constraints Created 6 years, 10 months ago
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Index: runtime/vm/intermediate_language_x64.cc
===================================================================
--- runtime/vm/intermediate_language_x64.cc (revision 32847)
+++ runtime/vm/intermediate_language_x64.cc (working copy)
@@ -885,8 +885,6 @@
if (class_id() == kTypedDataFloat32ArrayCid) {
// Load single precision float.
__ movss(result, element_address);
- // Promote to double.
- __ cvtss2sd(result, locs()->out().fpu_reg());
} else if (class_id() == kTypedDataFloat64ArrayCid) {
__ movsd(result, element_address);
} else {
@@ -1014,9 +1012,6 @@
locs->set_in(2, Location::WritableRegister());
break;
case kTypedDataFloat32ArrayCid:
- // Need temp register for float-to-double conversion.
- locs->AddTemp(Location::RequiresFpuRegister());
- // Fall through.
case kTypedDataFloat64ArrayCid:
// TODO(srdjan): Support Float64 constants.
locs->set_in(2, Location::RequiresFpuRegister());
@@ -1131,10 +1126,7 @@
break;
}
case kTypedDataFloat32ArrayCid:
- // Convert to single precision.
- __ cvtsd2ss(locs()->temp(0).fpu_reg(), locs()->in(2).fpu_reg());
- // Store.
- __ movss(element_address, locs()->temp(0).fpu_reg());
+ __ movss(element_address, locs()->in(2).fpu_reg());
break;
case kTypedDataFloat64ArrayCid:
__ movsd(element_address, locs()->in(2).fpu_reg());
@@ -4189,6 +4181,38 @@
}
+LocationSummary* DoubleToFloatInstr::MakeLocationSummary(bool opt) const {
+ const intptr_t kNumInputs = 1;
+ const intptr_t kNumTemps = 0;
+ LocationSummary* result =
+ new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+ result->set_in(0, Location::RequiresFpuRegister());
+ result->set_out(Location::SameAsFirstInput());
+ return result;
+}
+
+
+void DoubleToFloatInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+ __ cvtsd2ss(locs()->out().fpu_reg(), locs()->in(0).fpu_reg());
+}
+
+
+LocationSummary* FloatToDoubleInstr::MakeLocationSummary(bool opt) const {
+ const intptr_t kNumInputs = 1;
+ const intptr_t kNumTemps = 0;
+ LocationSummary* result =
+ new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+ result->set_in(0, Location::RequiresFpuRegister());
+ result->set_out(Location::SameAsFirstInput());
+ return result;
+}
+
+
+void FloatToDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+ __ cvtss2sd(locs()->out().fpu_reg(), locs()->in(0).fpu_reg());
+}
+
+
LocationSummary* InvokeMathCFunctionInstr::MakeLocationSummary(bool opt) const {
// Calling convention on x64 uses XMM0 and XMM1 to pass the first two
// double arguments and XMM0 to return the result. Unfortunately
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