A64: Use fixed width MemoryRead/Write in simulator.

src/a64/simulator-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1204 matching lines @@
   LoadStoreHelper(instr, offset, Offset);
 }
 
 
 void Simulator::LoadStoreHelper(Instruction* instr,
                                 int64_t offset,
                                 AddrMode addrmode) {
   unsigned srcdst = instr->Rt();
   unsigned addr_reg = instr->Rn();
   uint8_t* address = LoadStoreAddress(addr_reg, offset, addrmode);
-  int num_bytes = 1 << instr->SizeLS();
   uint8_t* stack = NULL;
 
   // Handle the writeback for stores before the store. On a CPU the writeback
   // and the store are atomic, but when running on the simulator it is possible
   // to be interrupted in between. The simulator is not thread safe and V8 does
   // not require it to be to run JavaScript therefore the profiler may sample
   // the "simulated" CPU in the middle of load/store with writeback. The code
   // below ensures that push operations are safe even when interrupted: the
   // stack pointer will be decremented before adding an element to the stack.
   if (instr->IsStore()) {
     LoadStoreWriteBack(addr_reg, offset, addrmode);
 
     // For store the address post writeback is used to check access below the
     // stack.
     stack = reinterpret_cast<uint8_t*>(sp());
   }
 
   LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreOpMask));
   switch (op) {
-    case LDRB_w:
-    case LDRH_w:
-    case LDR_w:
-    case LDR_x: set_xreg(srcdst, MemoryRead(address, num_bytes)); break;
-    case STRB_w:
-    case STRH_w:
-    case STR_w:
-    case STR_x: MemoryWrite(address, xreg(srcdst), num_bytes); break;
+    case LDRB_w: set_xreg(srcdst, MemoryRead8(address)); break;
+    case LDRH_w: set_xreg(srcdst, MemoryRead16(address)); break;
+    case LDR_w:  set_xreg(srcdst, MemoryRead32(address)); break;
+    case LDR_x:  set_xreg(srcdst, MemoryRead64(address)); break;
+    case STRB_w: MemoryWrite8(address, reg<uint8_t>(srcdst)); break;
+    case STRH_w: MemoryWrite16(address, reg<uint16_t>(srcdst)); break;
+    case STR_w:  MemoryWrite32(address, reg<uint32_t>(srcdst)); break;
+    case STR_x:  MemoryWrite64(address, reg<uint64_t>(srcdst)); break;
     case LDRSB_w: {
       set_wreg(srcdst, ExtendValue(kWRegSize, MemoryRead8(address), SXTB));
       break;
     }
     case LDRSB_x: {
       set_xreg(srcdst, ExtendValue(kXRegSize, MemoryRead8(address), SXTB));
       break;
     }
     case LDRSH_w: {
       set_wreg(srcdst, ExtendValue(kWRegSize, MemoryRead16(address), SXTH));
@@ skipping 209 matching lines @@
 
 uint64_t Simulator::MemoryRead(uint8_t* address, unsigned num_bytes) {
   ASSERT(address != NULL);
   ASSERT((num_bytes > 0) && (num_bytes <= sizeof(uint64_t)));
   uint64_t read = 0;
   memcpy(&read, address, num_bytes);
   return read;
 }
 
 
-uint8_t Simulator::MemoryRead8(uint8_t* address) {
-  return MemoryRead(address, sizeof(uint8_t));
-}
-
-
-uint16_t Simulator::MemoryRead16(uint8_t* address) {
-  return MemoryRead(address, sizeof(uint16_t));
-}
-
-
-uint32_t Simulator::MemoryRead32(uint8_t* address) {
-  return MemoryRead(address, sizeof(uint32_t));
-}
-
-
 float Simulator::MemoryReadFP32(uint8_t* address) {
   return rawbits_to_float(MemoryRead32(address));
 }
 
 
-uint64_t Simulator::MemoryRead64(uint8_t* address) {
-  return MemoryRead(address, sizeof(uint64_t));
-}
-
-
 double Simulator::MemoryReadFP64(uint8_t* address) {
   return rawbits_to_double(MemoryRead64(address));
 }
 
 
 void Simulator::MemoryWrite(uint8_t* address,
                             uint64_t value,
                             unsigned num_bytes) {
   ASSERT(address != NULL);
   ASSERT((num_bytes > 0) && (num_bytes <= sizeof(uint64_t)));
 
   LogWrite(address, value, num_bytes);
   memcpy(address, &value, num_bytes);
 }
 
 
-void Simulator::MemoryWrite32(uint8_t* address, uint32_t value) {
-  MemoryWrite(address, value, sizeof(uint32_t));
-}
-
-
 void Simulator::MemoryWriteFP32(uint8_t* address, float value) {
   MemoryWrite32(address, float_to_rawbits(value));
 }
 
 
-void Simulator::MemoryWrite64(uint8_t* address, uint64_t value) {
-  MemoryWrite(address, value, sizeof(uint64_t));
-}
-
-
 void Simulator::MemoryWriteFP64(uint8_t* address, double value) {
   MemoryWrite64(address, double_to_rawbits(value));
 }
 
 
 void Simulator::VisitMoveWideImmediate(Instruction* instr) {
   MoveWideImmediateOp mov_op =
     static_cast<MoveWideImmediateOp>(instr->Mask(MoveWideImmediateMask));
   int64_t new_xn_val = 0;
 
@@ skipping 1857 matching lines @@
     default:
       UNIMPLEMENTED();
   }
 }
 
 #endif  // USE_SIMULATOR
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64