Enable concurrent sweep on MIPS and ARM64.

runtime/vm/disassembler_mips.cc

Index: runtime/vm/disassembler_mips.cc
diff --git a/runtime/vm/disassembler_mips.cc b/runtime/vm/disassembler_mips.cc
index a6195fba874a1e191f5edfc78e4c4cf988146a31..b9e0987e1ca8231632dbe50ee078ec7b021c0027 100644
--- a/runtime/vm/disassembler_mips.cc
+++ b/runtime/vm/disassembler_mips.cc
@@ -712,6 +712,10 @@ void MIPSDecoder::InstructionDecode(Instr* instr) {
       Format(instr, "lui 'rt, 'immu");
       break;
     }
+    case LL: {
+      Format(instr, "ll 'rt, 'imms('rs)");
+      break;
+    }
     case LW: {
       Format(instr, "lw 'rt, 'imms('rs)");
       break;
@@ -728,6 +732,10 @@ void MIPSDecoder::InstructionDecode(Instr* instr) {
       Format(instr, "sb 'rt, 'imms('rs)");
       break;
     }
+    case SC: {
+      Format(instr, "sc 'rt, 'imms('rs)");
+      break;
+    }
     case SLTI: {
       Format(instr, "slti 'rt, 'rs, 'imms");
       break;