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Side by Side Diff: runtime/vm/disassembler_mips.cc

Issue 1722013002: Enable concurrent sweep on MIPS and ARM64. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/disassembler.h" 5 #include "vm/disassembler.h"
6 6
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS.
8 #if defined(TARGET_ARCH_MIPS) 8 #if defined(TARGET_ARCH_MIPS)
9 #include "platform/assert.h" 9 #include "platform/assert.h"
10 10
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705 break; 705 break;
706 } 706 }
707 case LHU: { 707 case LHU: {
708 Format(instr, "lhu 'rt, 'imms('rs)"); 708 Format(instr, "lhu 'rt, 'imms('rs)");
709 break; 709 break;
710 } 710 }
711 case LUI: { 711 case LUI: {
712 Format(instr, "lui 'rt, 'immu"); 712 Format(instr, "lui 'rt, 'immu");
713 break; 713 break;
714 } 714 }
715 case LL: {
716 Format(instr, "ll 'rt, 'imms('rs)");
717 break;
718 }
715 case LW: { 719 case LW: {
716 Format(instr, "lw 'rt, 'imms('rs)"); 720 Format(instr, "lw 'rt, 'imms('rs)");
717 break; 721 break;
718 } 722 }
719 case LWC1: { 723 case LWC1: {
720 Format(instr, "lwc1 'ft, 'imms('rs)"); 724 Format(instr, "lwc1 'ft, 'imms('rs)");
721 break; 725 break;
722 } 726 }
723 case ORI: { 727 case ORI: {
724 Format(instr, "ori 'rt, 'rs, 'immu"); 728 Format(instr, "ori 'rt, 'rs, 'immu");
725 break; 729 break;
726 } 730 }
727 case SB: { 731 case SB: {
728 Format(instr, "sb 'rt, 'imms('rs)"); 732 Format(instr, "sb 'rt, 'imms('rs)");
729 break; 733 break;
730 } 734 }
735 case SC: {
736 Format(instr, "sc 'rt, 'imms('rs)");
737 break;
738 }
731 case SLTI: { 739 case SLTI: {
732 Format(instr, "slti 'rt, 'rs, 'imms"); 740 Format(instr, "slti 'rt, 'rs, 'imms");
733 break; 741 break;
734 } 742 }
735 case SLTIU: { 743 case SLTIU: {
736 Format(instr, "sltiu 'rt, 'rs, 'imms"); 744 Format(instr, "sltiu 'rt, 'rs, 'imms");
737 break; 745 break;
738 } 746 }
739 case SH: { 747 case SH: {
740 Format(instr, "sh 'rt, 'imms('rs)"); 748 Format(instr, "sh 'rt, 'imms('rs)");
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774 if (out_instr_len) { 782 if (out_instr_len) {
775 *out_instr_len = Instr::kInstrSize; 783 *out_instr_len = Instr::kInstrSize;
776 } 784 }
777 } 785 }
778 786
779 #endif // !PRODUCT 787 #endif // !PRODUCT
780 788
781 } // namespace dart 789 } // namespace dart
782 790
783 #endif // defined TARGET_ARCH_MIPS 791 #endif // defined TARGET_ARCH_MIPS
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