Fix more register allocation bugs in optimized code on ARM.

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "lib/error.h"
@@ skipping 2136 matching lines @@
       }
       const intptr_t max_right = kSmiBits - Utils::HighestBit(left_int);
       const bool right_needs_check =
           (right_range == NULL) ||
           !right_range->IsWithin(0, max_right - 1);
       if (right_needs_check) {
         __ cmp(right,
                ShifterOperand(reinterpret_cast<int32_t>(Smi::New(max_right))));
         __ b(deopt, CS);
       }
-      __ SmiUntag(right);
-      __ Lsl(result, left, right);
+      __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
+      __ Lsl(result, left, IP);
     }
     return;
   }
 
   const bool right_needs_check =
       (right_range == NULL) || !right_range->IsWithin(0, (Smi::kBits - 1));
   if (is_truncating) {
     if (right_needs_check) {
       const bool right_may_be_negative =
           (right_range == NULL) ||
           !right_range->IsWithin(0, RangeBoundary::kPlusInfinity);
       if (right_may_be_negative) {
         ASSERT(shift_left->CanDeoptimize());
         __ cmp(right, ShifterOperand(0));
         __ b(deopt, MI);
       }
 
       __ cmp(right,
              ShifterOperand(reinterpret_cast<int32_t>(Smi::New(Smi::kBits))));
       __ mov(result, ShifterOperand(0), CS);
-      __ SmiUntag(right, CC);
-      __ Lsl(result, left, right, CC);
+      __ Asr(IP, right, kSmiTagSize, CC);  // SmiUntag right into IP if CC.
+      __ Lsl(result, left, IP, CC);
     } else {
-      __ SmiUntag(right);
-      __ Lsl(result, left, right);
+      __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
+      __ Lsl(result, left, IP);
     }
   } else {
     if (right_needs_check) {
       ASSERT(shift_left->CanDeoptimize());
       __ cmp(right,
              ShifterOperand(reinterpret_cast<int32_t>(Smi::New(Smi::kBits))));
       __ b(deopt, CS);
     }
     // Left is not a constant.
     // Check if count too large for handling it inlined.
-    __ SmiUntag(right);
-    // Overflow test (preserve left and right);
-    __ Lsl(IP, left, right);
-    __ cmp(left, ShifterOperand(IP, ASR, right));
+    __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
+    // Overflow test (preserve left, right, and IP);
+    Register temp = locs.temp(0).reg();
+    __ Lsl(temp, left, IP);
+    __ cmp(left, ShifterOperand(temp, ASR, IP));
     __ b(deopt, NE);  // Overflow.
     // Shift for result now we know there is no overflow.
-    __ Lsl(result, left, right);
+    __ Lsl(result, left, IP);
   }
 }
 
 
 LocationSummary* BinarySmiOpInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 2;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   if (op_kind() == Token::kTRUNCDIV) {
+    summary->set_in(0, Location::RequiresRegister());
     if (RightIsPowerOfTwoConstant()) {
-      summary->set_in(0, Location::RequiresRegister());
       ConstantInstr* right_constant = right()->definition()->AsConstant();
       summary->set_in(1, Location::Constant(right_constant->value()));
-      summary->set_out(Location::RequiresRegister());
     } else {
-      // Both inputs must be writable because they will be untagged.
-      summary->set_in(0, Location::WritableRegister());
-      summary->set_in(1, Location::WritableRegister());
-      summary->set_out(Location::RequiresRegister());
+      summary->set_in(1, Location::RequiresRegister());
     }
+    summary->AddTemp(Location::RequiresRegister());
+    summary->set_out(Location::RequiresRegister());
     return summary;
   }
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RegisterOrSmiConstant(right()));
+  if (((op_kind() == Token::kSHL) && !is_truncating()) ||
+      (op_kind() == Token::kSHR)) {
+    summary->AddTemp(Location::RequiresRegister());
+  }
   // We make use of 3-operand instructions by not requiring result register
   // to be identical to first input register as on Intel.
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
 void BinarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   if (op_kind() == Token::kSHL) {
     EmitSmiShiftLeft(compiler, this);
     return;
   }
 
   ASSERT(!is_truncating());
   Register left = locs()->in(0).reg();
   Register result = locs()->out().reg();
   Label* deopt = NULL;
   if (CanDeoptimize()) {
-    deopt  = compiler->AddDeoptStub(deopt_id(), kDeoptBinarySmiOp);
+    deopt = compiler->AddDeoptStub(deopt_id(), kDeoptBinarySmiOp);
   }
 
   if (locs()->in(1).IsConstant()) {
     const Object& constant = locs()->in(1).constant();
     ASSERT(constant.IsSmi());
     int32_t imm = reinterpret_cast<int32_t>(constant.raw());
     switch (op_kind()) {
       case Token::kSUB: {
         imm = -imm;  // TODO(regis): What if deopt != NULL && imm == 0x80000000?
         // Fall through.
@@ skipping 43 matching lines @@
           __ b(deopt, EQ);
           __ rsb(result, left, ShifterOperand(0));
           break;
         }
         ASSERT((value != 0) && Utils::IsPowerOfTwo(Utils::Abs(value)));
         const intptr_t shift_count =
             Utils::ShiftForPowerOfTwo(Utils::Abs(value)) + kSmiTagSize;
         ASSERT(kSmiTagSize == 1);
         __ mov(IP, ShifterOperand(left, ASR, 31));
         ASSERT(shift_count > 1);  // 1, -1 case handled above.
-        __ add(left, left, ShifterOperand(IP, LSR, 32 - shift_count));
+        Register temp = locs()->temp(0).reg();
+        __ add(temp, left, ShifterOperand(IP, LSR, 32 - shift_count));
         ASSERT(shift_count > 0);
-        __ mov(result, ShifterOperand(left, ASR, shift_count));
+        __ mov(result, ShifterOperand(temp, ASR, shift_count));
         if (value < 0) {
           __ rsb(result, result, ShifterOperand(0));
         }
         __ SmiTag(result);
         break;
       }
       case Token::kBIT_AND: {
         // No overflow check.
         ShifterOperand shifter_op;
         if (ShifterOperand::CanHold(imm, &shifter_op)) {
@@ skipping 72 matching lines @@
     case Token::kSUB: {
       if (deopt == NULL) {
         __ sub(result, left, ShifterOperand(right));
       } else {
         __ subs(result, left, ShifterOperand(right));
         __ b(deopt, VS);
       }
       break;
     }
     case Token::kMUL: {
-      __ SmiUntag(left);
+      __ Asr(IP, left, kSmiTagSize);  // SmiUntag left into IP.
       if (deopt == NULL) {
-        __ mul(result, left, right);
+        __ mul(result, IP, right);
       } else {
-        __ smull(result, IP, left, right);
+        __ smull(result, IP, IP, right);
         // IP: result bits 32..63.
         __ cmp(IP, ShifterOperand(result, ASR, 31));
         __ b(deopt, NE);
       }
       break;
     }
     case Token::kBIT_AND: {
       // No overflow check.
       __ and_(result, left, ShifterOperand(right));
       break;
     }
     case Token::kBIT_OR: {
       // No overflow check.
       __ orr(result, left, ShifterOperand(right));
       break;
     }
     case Token::kBIT_XOR: {
       // No overflow check.
       __ eor(result, left, ShifterOperand(right));
       break;
     }
     case Token::kTRUNCDIV: {
       // Handle divide by zero in runtime.
       __ cmp(right, ShifterOperand(0));
       __ b(deopt, EQ);
-      __ SmiUntag(left);
-      __ SmiUntag(right);
+      Register temp = locs()->temp(0).reg();
+      __ Asr(temp, left, kSmiTagSize);  // SmiUntag left into temp.
+      __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
       if (!CPUFeatures::integer_division_supported()) {
         UNIMPLEMENTED();
       }
-      __ sdiv(result, left, right);
+      __ sdiv(result, temp, IP);
       // Check the corner case of dividing the 'MIN_SMI' with -1, in which
       // case we cannot tag the result.
       __ CompareImmediate(result, 0x40000000);
       __ b(deopt, EQ);
       __ SmiTag(result);
       break;
     }
     case Token::kSHR: {
       if (CanDeoptimize()) {
         __ CompareImmediate(right, 0);
         __ b(deopt, LT);
       }
-      __ SmiUntag(right);
+      __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
       // sarl operation masks the count to 5 bits.
       const intptr_t kCountLimit = 0x1F;
       Range* right_range = this->right()->definition()->range();
       if ((right_range == NULL) ||
           !right_range->IsWithin(RangeBoundary::kMinusInfinity, kCountLimit)) {
-        __ CompareImmediate(right, kCountLimit);
-        __ LoadImmediate(right, kCountLimit, GT);
+        __ CompareImmediate(IP, kCountLimit);
+        __ LoadImmediate(IP, kCountLimit, GT);
       }
-      __ SmiUntag(left);
-      __ Asr(result, left, right);
+      Register temp = locs()->temp(0).reg();
+      __ Asr(temp, left, kSmiTagSize);  // SmiUntag left into temp.
+      __ Asr(result, temp, IP);
       __ SmiTag(result);
       break;
     }
     case Token::kDIV: {
       // Dispatches to 'Double./'.
       // TODO(srdjan): Implement as conversion to double and double division.
       UNREACHABLE();
       break;
     }
     case Token::kMOD: {
@@ skipping 1140 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM