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Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1716483003: Subzero: implement 64 bit multiply in mips32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: changes suggested by stichnot Created 4 years, 10 months ago
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1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
7 ; RUN: | %if --need=target_X8632 --command FileCheck %s 7 ; RUN: | %if --need=target_X8632 --command FileCheck %s
8 8
9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ 10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \
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350 ; OPTM1: add 350 ; OPTM1: add
351 ; OPTM1: imul 351 ; OPTM1: imul
352 ; OPTM1: add 352 ; OPTM1: add
353 353
354 ; ARM32-LABEL: mul64BitSigned 354 ; ARM32-LABEL: mul64BitSigned
355 ; ARM32: mul 355 ; ARM32: mul
356 ; ARM32: mla 356 ; ARM32: mla
357 ; ARM32: umull 357 ; ARM32: umull
358 ; ARM32: add 358 ; ARM32: add
359 359
360 ; MIPS32-LABEL: mul64BitSigned
361 ; MIPS32: multu
362 ; MIPS32: mflo
363 ; MIPS32: mfhi
364 ; MIPS32: mul
365 ; MIPS32: mul
366 ; MIPS32: addu
367 ; MIPS32: addu
368
360 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { 369 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) {
361 entry: 370 entry:
362 %mul = mul i64 %b, %a 371 %mul = mul i64 %b, %a
363 ret i64 %mul 372 ret i64 %mul
364 } 373 }
365 ; CHECK-LABEL: mul64BitUnsigned 374 ; CHECK-LABEL: mul64BitUnsigned
366 ; CHECK: imul 375 ; CHECK: imul
367 ; CHECK: mul 376 ; CHECK: mul
368 ; CHECK: add 377 ; CHECK: add
369 ; CHECK: imul 378 ; CHECK: imul
370 ; CHECK: add 379 ; CHECK: add
371 ; 380 ;
372 ; OPTM1-LABEL: mul64BitUnsigned 381 ; OPTM1-LABEL: mul64BitUnsigned
373 ; OPTM1: imul 382 ; OPTM1: imul
374 ; OPTM1: mul 383 ; OPTM1: mul
375 ; OPTM1: add 384 ; OPTM1: add
376 ; OPTM1: imul 385 ; OPTM1: imul
377 ; OPTM1: add 386 ; OPTM1: add
378 387
379 ; ARM32-LABEL: mul64BitUnsigned 388 ; ARM32-LABEL: mul64BitUnsigned
380 ; ARM32: mul 389 ; ARM32: mul
381 ; ARM32: mla 390 ; ARM32: mla
382 ; ARM32: umull 391 ; ARM32: umull
383 ; ARM32: add 392 ; ARM32: add
384 393
394 ; MIPS32-LABEL: mul64BitUnsigned
395 ; MIPS32: multu
396 ; MIPS32: mflo
397 ; MIPS32: mfhi
398 ; MIPS32: mul
399 ; MIPS32: mul
400 ; MIPS32: addu
401 ; MIPS32: addu
402
385 define internal i64 @div64BitSigned(i64 %a, i64 %b) { 403 define internal i64 @div64BitSigned(i64 %a, i64 %b) {
386 entry: 404 entry:
387 %div = sdiv i64 %a, %b 405 %div = sdiv i64 %a, %b
388 ret i64 %div 406 ret i64 %div
389 } 407 }
390 ; CHECK-LABEL: div64BitSigned 408 ; CHECK-LABEL: div64BitSigned
391 ; CHECK: call {{.*}} R_{{.*}} __divdi3 409 ; CHECK: call {{.*}} R_{{.*}} __divdi3
392 410
393 ; OPTM1-LABEL: div64BitSigned 411 ; OPTM1-LABEL: div64BitSigned
394 ; OPTM1: call {{.*}} R_{{.*}} __divdi3 412 ; OPTM1: call {{.*}} R_{{.*}} __divdi3
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1953 1971
1954 ; CHECK-LABEL: phi64Undef 1972 ; CHECK-LABEL: phi64Undef
1955 ; CHECK: mov {{.*}},0x0 1973 ; CHECK: mov {{.*}},0x0
1956 ; CHECK: mov {{.*}},0x0 1974 ; CHECK: mov {{.*}},0x0
1957 ; OPTM1-LABEL: phi64Undef 1975 ; OPTM1-LABEL: phi64Undef
1958 ; OPTM1: mov {{.*}},0x0 1976 ; OPTM1: mov {{.*}},0x0
1959 ; OPTM1: mov {{.*}},0x0 1977 ; OPTM1: mov {{.*}},0x0
1960 ; ARM32-LABEL: phi64Undef 1978 ; ARM32-LABEL: phi64Undef
1961 ; ARM32: mov {{.*}} #0 1979 ; ARM32: mov {{.*}} #0
1962 ; ARM32: mov {{.*}} #0 1980 ; ARM32: mov {{.*}} #0
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