Subzero: implement 64 bit multiply in mips32

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-===    //
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 106 matching lines @@
 public:
   enum InstKindMIPS32 {
     k__Start = Inst::Target,
     Add,
     Addu,
     And,
     Addiu,
     Call,
     La,
     Lui,
+    Mfhi,
+    Mflo,
     Mov, // actually a pseudo op for addi rd, rs, 0
+    Mthi,
+    Mtlo,
     Mul,
+    Mult,
+    Multu,
     Or,
     Ori,
     Ret,
     Sub,
     Subu,
     Sltu,
     Xor
   };
 
   static const char *getWidthString(Type Ty);
 
   void dump(const Cfg *Func) const override;
 
   void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const {
     Str << Opcode << "." << Ty;
   }
 
   // TODO(rkotler): while branching is not implemented
   bool repointEdges(CfgNode *, CfgNode *) override { return true; }
 
   /// Shared emit routines for common forms of instructions.
   static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst,
                              const Cfg *Func);
+  static void emitUnaryopGPRFLoHi(const char *Opcode, const InstMIPS32 *Inst,
+                                  const Cfg *Func);
+  static void emitUnaryopGPRTLoHi(const char *Opcode, const InstMIPS32 *Inst,
+                                  const Cfg *Func);
   static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst,
                             const Cfg *Func);
+  static void emitThreeAddrLoHi(const char *Opcode, const InstMIPS32 *Inst,
+                                const Cfg *Func);
 
 protected:
   InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest)
       : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {}
   static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) {
     return Inst->getKind() == static_cast<InstKind>(MyKind);
   }
 };
 
 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra"
@@ skipping 208 matching lines @@
 
   const uint32_t Imm;
 };
 
 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
+using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
+using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
+using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
+using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
+using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
+using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>;
 
 /// Handles (some of) vmov's various formats.
 class InstMIPS32Mov final : public InstMIPS32 {
@@ skipping 31 matching lines @@
   void emitSingleDestMultiSource(const Cfg *Func) const;
   void emitSingleDestSingleSource(const Cfg *Func) const;
 
   Variable *DestHi = nullptr;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H