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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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117 public: | 117 public: |
118 enum InstKindMIPS32 { | 118 enum InstKindMIPS32 { |
119 k__Start = Inst::Target, | 119 k__Start = Inst::Target, |
120 Add, | 120 Add, |
121 Addu, | 121 Addu, |
122 And, | 122 And, |
123 Addiu, | 123 Addiu, |
124 Call, | 124 Call, |
125 La, | 125 La, |
126 Lui, | 126 Lui, |
| 127 Mfhi, |
| 128 Mflo, |
127 Mov, // actually a pseudo op for addi rd, rs, 0 | 129 Mov, // actually a pseudo op for addi rd, rs, 0 |
| 130 Mthi, |
| 131 Mtlo, |
128 Mul, | 132 Mul, |
| 133 Mult, |
| 134 Multu, |
129 Or, | 135 Or, |
130 Ori, | 136 Ori, |
131 Ret, | 137 Ret, |
132 Sub, | 138 Sub, |
133 Subu, | 139 Subu, |
134 Sltu, | 140 Sltu, |
135 Xor | 141 Xor |
136 }; | 142 }; |
137 | 143 |
138 static const char *getWidthString(Type Ty); | 144 static const char *getWidthString(Type Ty); |
139 | 145 |
140 void dump(const Cfg *Func) const override; | 146 void dump(const Cfg *Func) const override; |
141 | 147 |
142 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { | 148 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { |
143 Str << Opcode << "." << Ty; | 149 Str << Opcode << "." << Ty; |
144 } | 150 } |
145 | 151 |
146 // TODO(rkotler): while branching is not implemented | 152 // TODO(rkotler): while branching is not implemented |
147 bool repointEdges(CfgNode *, CfgNode *) override { return true; } | 153 bool repointEdges(CfgNode *, CfgNode *) override { return true; } |
148 | 154 |
149 /// Shared emit routines for common forms of instructions. | 155 /// Shared emit routines for common forms of instructions. |
150 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, | 156 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, |
151 const Cfg *Func); | 157 const Cfg *Func); |
| 158 static void emitUnaryopGPRFLoHi(const char *Opcode, const InstMIPS32 *Inst, |
| 159 const Cfg *Func); |
| 160 static void emitUnaryopGPRTLoHi(const char *Opcode, const InstMIPS32 *Inst, |
| 161 const Cfg *Func); |
152 static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst, | 162 static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst, |
153 const Cfg *Func); | 163 const Cfg *Func); |
| 164 static void emitThreeAddrLoHi(const char *Opcode, const InstMIPS32 *Inst, |
| 165 const Cfg *Func); |
154 | 166 |
155 protected: | 167 protected: |
156 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) | 168 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) |
157 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} | 169 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
158 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { | 170 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { |
159 return Inst->getKind() == static_cast<InstKind>(MyKind); | 171 return Inst->getKind() == static_cast<InstKind>(MyKind); |
160 } | 172 } |
161 }; | 173 }; |
162 | 174 |
163 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra" | 175 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra" |
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372 | 384 |
373 const uint32_t Imm; | 385 const uint32_t Imm; |
374 }; | 386 }; |
375 | 387 |
376 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; | 388 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; |
377 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; | 389 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; |
378 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; | 390 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; |
379 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; | 391 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; |
380 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; | 392 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; |
381 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; | 393 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; |
| 394 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; |
| 395 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; |
| 396 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; |
| 397 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; |
382 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | 398 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; |
| 399 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; |
| 400 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; |
383 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | 401 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; |
384 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 402 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
385 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; | 403 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; |
386 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; | 404 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; |
387 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; | 405 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; |
388 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | 406 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; |
389 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; | 407 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; |
390 | 408 |
391 /// Handles (some of) vmov's various formats. | 409 /// Handles (some of) vmov's various formats. |
392 class InstMIPS32Mov final : public InstMIPS32 { | 410 class InstMIPS32Mov final : public InstMIPS32 { |
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424 void emitSingleDestMultiSource(const Cfg *Func) const; | 442 void emitSingleDestMultiSource(const Cfg *Func) const; |
425 void emitSingleDestSingleSource(const Cfg *Func) const; | 443 void emitSingleDestSingleSource(const Cfg *Func) const; |
426 | 444 |
427 Variable *DestHi = nullptr; | 445 Variable *DestHi = nullptr; |
428 }; | 446 }; |
429 | 447 |
430 } // end of namespace MIPS32 | 448 } // end of namespace MIPS32 |
431 } // end of namespace Ice | 449 } // end of namespace Ice |
432 | 450 |
433 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 451 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
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