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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1480 case 'S': { // IS - Test and branch bit. | 1480 case 'S': { // IS - Test and branch bit. |
1481 AppendToOutput("#%d", (instr->ImmTestBranchBit5() << 5) | | 1481 AppendToOutput("#%d", (instr->ImmTestBranchBit5() << 5) | |
1482 instr->ImmTestBranchBit40()); | 1482 instr->ImmTestBranchBit40()); |
1483 return 2; | 1483 return 2; |
1484 } | 1484 } |
1485 case 'D': { // IDebug - HLT and BRK instructions. | 1485 case 'D': { // IDebug - HLT and BRK instructions. |
1486 AppendToOutput("#0x%x", instr->ImmException()); | 1486 AppendToOutput("#0x%x", instr->ImmException()); |
1487 return 6; | 1487 return 6; |
1488 } | 1488 } |
1489 default: { | 1489 default: { |
1490 UNIMPLEMENTED(); | 1490 UNREACHABLE(); |
1491 return 0; | 1491 return 0; |
1492 } | 1492 } |
1493 } | 1493 } |
1494 } | 1494 } |
1495 | 1495 |
1496 | 1496 |
1497 int Disassembler::SubstituteBitfieldImmediateField(Instruction* instr, | 1497 int Disassembler::SubstituteBitfieldImmediateField(Instruction* instr, |
1498 const char* format) { | 1498 const char* format) { |
1499 ASSERT((format[0] == 'I') && (format[1] == 'B')); | 1499 ASSERT((format[0] == 'I') && (format[1] == 'B')); |
1500 unsigned r = instr->ImmR(); | 1500 unsigned r = instr->ImmR(); |
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1556 } // Fall through. | 1556 } // Fall through. |
1557 case 'L': { // HLo. | 1557 case 'L': { // HLo. |
1558 if (instr->ImmDPShift() != 0) { | 1558 if (instr->ImmDPShift() != 0) { |
1559 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; | 1559 const char* shift_type[] = {"lsl", "lsr", "asr", "ror"}; |
1560 AppendToOutput(", %s #%" PRId64, shift_type[instr->ShiftDP()], | 1560 AppendToOutput(", %s #%" PRId64, shift_type[instr->ShiftDP()], |
1561 instr->ImmDPShift()); | 1561 instr->ImmDPShift()); |
1562 } | 1562 } |
1563 return 3; | 1563 return 3; |
1564 } | 1564 } |
1565 default: | 1565 default: |
1566 UNIMPLEMENTED(); | 1566 UNREACHABLE(); |
1567 return 0; | 1567 return 0; |
1568 } | 1568 } |
1569 } | 1569 } |
1570 | 1570 |
1571 | 1571 |
1572 int Disassembler::SubstituteConditionField(Instruction* instr, | 1572 int Disassembler::SubstituteConditionField(Instruction* instr, |
1573 const char* format) { | 1573 const char* format) { |
1574 ASSERT(format[0] == 'C'); | 1574 ASSERT(format[0] == 'C'); |
1575 const char* condition_code[] = { "eq", "ne", "hs", "lo", | 1575 const char* condition_code[] = { "eq", "ne", "hs", "lo", |
1576 "mi", "pl", "vs", "vc", | 1576 "mi", "pl", "vs", "vc", |
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1618 int64_t offset = 0; | 1618 int64_t offset = 0; |
1619 switch (format[5]) { | 1619 switch (format[5]) { |
1620 // BImmUncn - unconditional branch immediate. | 1620 // BImmUncn - unconditional branch immediate. |
1621 case 'n': offset = instr->ImmUncondBranch(); break; | 1621 case 'n': offset = instr->ImmUncondBranch(); break; |
1622 // BImmCond - conditional branch immediate. | 1622 // BImmCond - conditional branch immediate. |
1623 case 'o': offset = instr->ImmCondBranch(); break; | 1623 case 'o': offset = instr->ImmCondBranch(); break; |
1624 // BImmCmpa - compare and branch immediate. | 1624 // BImmCmpa - compare and branch immediate. |
1625 case 'm': offset = instr->ImmCmpBranch(); break; | 1625 case 'm': offset = instr->ImmCmpBranch(); break; |
1626 // BImmTest - test and branch immediate. | 1626 // BImmTest - test and branch immediate. |
1627 case 'e': offset = instr->ImmTestBranch(); break; | 1627 case 'e': offset = instr->ImmTestBranch(); break; |
1628 default: UNIMPLEMENTED(); | 1628 default: UNREACHABLE(); |
1629 } | 1629 } |
1630 offset <<= kInstructionSizeLog2; | 1630 offset <<= kInstructionSizeLog2; |
1631 char sign = '+'; | 1631 char sign = '+'; |
1632 if (offset < 0) { | 1632 if (offset < 0) { |
1633 offset = -offset; | 1633 offset = -offset; |
1634 sign = '-'; | 1634 sign = '-'; |
1635 } | 1635 } |
1636 // TODO(mcapewel): look up pc + offset in label table. | 1636 // TODO(mcapewel): look up pc + offset in label table. |
1637 AppendToOutput("#%c0x%" PRIx64, sign, offset); | 1637 AppendToOutput("#%c0x%" PRIx64, sign, offset); |
1638 return 8; | 1638 return 8; |
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1845 decoder.AppendVisitor(&disasm); | 1845 decoder.AppendVisitor(&disasm); |
1846 | 1846 |
1847 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { | 1847 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { |
1848 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); | 1848 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); |
1849 } | 1849 } |
1850 } | 1850 } |
1851 | 1851 |
1852 } // namespace disasm | 1852 } // namespace disasm |
1853 | 1853 |
1854 #endif // V8_TARGET_ARCH_A64 | 1854 #endif // V8_TARGET_ARCH_A64 |
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