| OLD | NEW |
| 1 #define __SYSCALL_LL_E(x) (x) | 1 #define __SYSCALL_LL_E(x) (x) |
| 2 #define __SYSCALL_LL_O(x) (x) | 2 #define __SYSCALL_LL_O(x) (x) |
| 3 | 3 |
| 4 #define __scc(X) sizeof(1?(X):0ULL) < 8 ? (unsigned long) (X) : (long long) (X) | 4 #define __scc(X) \ |
| 5 sizeof(1 ? (X) : 0ULL) < 8 ? (unsigned long)(X) : (long long)(X) |
| 5 typedef long long syscall_arg_t; | 6 typedef long long syscall_arg_t; |
| 6 struct __timespec { long long tv_sec; long tv_nsec; }; | 7 struct __timespec { |
| 7 struct __timespec_kernel { long long tv_sec; long long tv_nsec; }; | 8 long long tv_sec; |
| 9 long tv_nsec; |
| 10 }; |
| 11 struct __timespec_kernel { |
| 12 long long tv_sec; |
| 13 long long tv_nsec; |
| 14 }; |
| 8 #define __tsc(X) ((struct __timespec*)(unsigned long)(X)) | 15 #define __tsc(X) ((struct __timespec*)(unsigned long)(X)) |
| 9 #define __fixup(X) do { if(X) { \ | 16 #define __fixup(X) \ |
| 10 » ts->tv_sec = __tsc(X)->tv_sec; \ | 17 do { \ |
| 11 » ts->tv_nsec = __tsc(X)->tv_nsec; \ | 18 if (X) { \ |
| 12 » (X) = (unsigned long)ts; } } while(0) | 19 ts->tv_sec = __tsc(X)->tv_sec; \ |
| 13 #define __fixup_case_2 \ | 20 ts->tv_nsec = __tsc(X)->tv_nsec; \ |
| 14 » case SYS_nanosleep: \ | 21 (X) = (unsigned long)ts; \ |
| 15 » » __fixup(a1); break; \ | 22 } \ |
| 16 » case SYS_clock_settime: \ | 23 } while (0) |
| 17 » » __fixup(a2); break; | 24 #define __fixup_case_2 \ |
| 18 #define __fixup_case_3 \ | 25 case SYS_nanosleep: \ |
| 19 » case SYS_clock_nanosleep: case SYS_rt_sigtimedwait: case SYS_ppoll: \ | 26 __fixup(a1); \ |
| 20 » » __fixup(a3); break; \ | 27 break; \ |
| 21 » case SYS_utimensat: \ | 28 case SYS_clock_settime: \ |
| 22 » » if(a3) { \ | 29 __fixup(a2); \ |
| 23 » » » ts[0].tv_sec = __tsc(a3)[0].tv_sec; \ | 30 break; |
| 24 » » » ts[0].tv_nsec = __tsc(a3)[0].tv_nsec; \ | 31 #define __fixup_case_3 \ |
| 25 » » » ts[1].tv_sec = __tsc(a3)[1].tv_sec; \ | 32 case SYS_clock_nanosleep: \ |
| 26 » » » ts[1].tv_nsec = __tsc(a3)[1].tv_nsec; \ | 33 case SYS_rt_sigtimedwait: \ |
| 27 » » » a3 = (unsigned long)ts; \ | 34 case SYS_ppoll: \ |
| 28 » » } break; | 35 __fixup(a3); \ |
| 29 #define __fixup_case_4 \ | 36 break; \ |
| 30 » case SYS_futex: \ | 37 case SYS_utimensat: \ |
| 31 » » if((a2 & (~128 /* FUTEX_PRIVATE_FLAG */)) == 0 /* FUTEX_WAIT */)
__fixup(a4); break; | 38 if (a3) { \ |
| 32 #define __fixup_case_5 \ | 39 ts[0].tv_sec = __tsc(a3)[0].tv_sec; \ |
| 33 » case SYS_mq_timedsend: case SYS_mq_timedreceive: case SYS_pselect6: \ | 40 ts[0].tv_nsec = __tsc(a3)[0].tv_nsec; \ |
| 34 » » __fixup(a5); break; | 41 ts[1].tv_sec = __tsc(a3)[1].tv_sec; \ |
| 42 ts[1].tv_nsec = __tsc(a3)[1].tv_nsec; \ |
| 43 a3 = (unsigned long)ts; \ |
| 44 } \ |
| 45 break; |
| 46 #define __fixup_case_4 \ |
| 47 case SYS_futex: \ |
| 48 if ((a2 & (~128 /* FUTEX_PRIVATE_FLAG */)) == 0 /* FUTEX_WAIT */) \ |
| 49 __fixup(a4); \ |
| 50 break; |
| 51 #define __fixup_case_5 \ |
| 52 case SYS_mq_timedsend: \ |
| 53 case SYS_mq_timedreceive: \ |
| 54 case SYS_pselect6: \ |
| 55 __fixup(a5); \ |
| 56 break; |
| 35 | 57 |
| 36 static __inline long __syscall0(long long n) | 58 static __inline long __syscall0(long long n) { |
| 37 { | 59 unsigned long ret; |
| 38 » unsigned long ret; | 60 __asm__ __volatile__("syscall" : "=a"(ret) : "a"(n) : "rcx", "r11", "memory"); |
| 39 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n) : "rcx", "r11", "me
mory"); | 61 return ret; |
| 40 » return ret; | |
| 41 } | 62 } |
| 42 | 63 |
| 43 static __inline long __syscall1(long long n, long long a1) | 64 static __inline long __syscall1(long long n, long long a1) { |
| 44 { | 65 unsigned long ret; |
| 45 » unsigned long ret; | 66 __asm__ __volatile__("syscall" |
| 46 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1) : "rcx", "
r11", "memory"); | 67 : "=a"(ret) |
| 47 » return ret; | 68 : "a"(n), "D"(a1) |
| 69 : "rcx", "r11", "memory"); |
| 70 return ret; |
| 48 } | 71 } |
| 49 | 72 |
| 50 static __inline long __syscall2(long long n, long long a1, long long a2) | 73 static __inline long __syscall2(long long n, long long a1, long long a2) { |
| 51 { | 74 unsigned long ret; |
| 52 » unsigned long ret; | 75 struct __timespec_kernel ts[1]; |
| 53 » struct __timespec_kernel ts[1]; | 76 switch (n) { __fixup_case_2; } |
| 54 » switch (n) { | 77 __asm__ __volatile__("syscall" |
| 55 » » __fixup_case_2; | 78 : "=a"(ret) |
| 56 » } | 79 : "a"(n), "D"(a1), "S"(a2) |
| 57 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2) | 80 : "rcx", "r11", "memory"); |
| 58 » » » » » : "rcx", "r11", "memory"); | 81 return ret; |
| 59 » return ret; | |
| 60 } | 82 } |
| 61 | 83 |
| 62 static __inline long __syscall3(long long n, long long a1, long long a2, long lo
ng a3) | 84 static __inline long __syscall3(long long n, |
| 63 { | 85 long long a1, |
| 64 » unsigned long ret; | 86 long long a2, |
| 65 » struct __timespec_kernel ts[2]; | 87 long long a3) { |
| 66 » switch (n) { | 88 unsigned long ret; |
| 67 » » __fixup_case_2; | 89 struct __timespec_kernel ts[2]; |
| 68 » » __fixup_case_3; | 90 switch (n) { |
| 69 » } | 91 __fixup_case_2; |
| 70 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), | 92 __fixup_case_3; |
| 71 » » » » » » "d"(a3) : "rcx", "r11", "memor
y"); | 93 } |
| 72 » return ret; | 94 __asm__ __volatile__("syscall" |
| 95 : "=a"(ret) |
| 96 : "a"(n), "D"(a1), "S"(a2), "d"(a3) |
| 97 : "rcx", "r11", "memory"); |
| 98 return ret; |
| 73 } | 99 } |
| 74 | 100 |
| 75 static __inline long __syscall4(long long n, long long a1, long long a2, long lo
ng a3, | 101 static __inline long __syscall4(long long n, |
| 76 long long a4_) | 102 long long a1, |
| 77 { | 103 long long a2, |
| 78 » unsigned long ret; | 104 long long a3, |
| 79 » register long long a4 __asm__("r10") = a4_; | 105 long long a4_) { |
| 80 » struct __timespec_kernel ts[2]; | 106 unsigned long ret; |
| 81 » switch (n) { | 107 register long long a4 __asm__("r10") = a4_; |
| 82 » » __fixup_case_2; | 108 struct __timespec_kernel ts[2]; |
| 83 » » __fixup_case_3; | 109 switch (n) { |
| 84 » » __fixup_case_4; | 110 __fixup_case_2; |
| 85 » } | 111 __fixup_case_3; |
| 86 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), | 112 __fixup_case_4; |
| 87 » » » » » "d"(a3), "r"(a4): "rcx", "r11", "memor
y"); | 113 } |
| 88 » return ret; | 114 __asm__ __volatile__("syscall" |
| 115 : "=a"(ret) |
| 116 : "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(a4) |
| 117 : "rcx", "r11", "memory"); |
| 118 return ret; |
| 89 } | 119 } |
| 90 | 120 |
| 91 static __inline long __syscall5(long long n, long long a1, long long a2, long lo
ng a3, | 121 static __inline long __syscall5(long long n, |
| 92 long long a4_, long long a5_) | 122 long long a1, |
| 93 { | 123 long long a2, |
| 94 » unsigned long ret; | 124 long long a3, |
| 95 » register long long a4 __asm__("r10") = a4_; | 125 long long a4_, |
| 96 » register long long a5 __asm__("r8") = a5_; | 126 long long a5_) { |
| 97 » struct __timespec_kernel ts[2]; | 127 unsigned long ret; |
| 98 » switch (n) { | 128 register long long a4 __asm__("r10") = a4_; |
| 99 » » __fixup_case_2; | 129 register long long a5 __asm__("r8") = a5_; |
| 100 » » __fixup_case_3; | 130 struct __timespec_kernel ts[2]; |
| 101 » » __fixup_case_4; | 131 switch (n) { |
| 102 » » __fixup_case_5; | 132 __fixup_case_2; |
| 103 » } | 133 __fixup_case_3; |
| 104 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), | 134 __fixup_case_4; |
| 105 » » » » » "d"(a3), "r"(a4), "r"(a5) : "rcx", "r1
1", "memory"); | 135 __fixup_case_5; |
| 106 » return ret; | 136 } |
| 137 __asm__ __volatile__("syscall" |
| 138 : "=a"(ret) |
| 139 : "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(a4), "r"(a5) |
| 140 : "rcx", "r11", "memory"); |
| 141 return ret; |
| 107 } | 142 } |
| 108 | 143 |
| 109 static __inline long __syscall6(long long n, long long a1, long long a2, long lo
ng a3, | 144 static __inline long __syscall6(long long n, |
| 110 long long a4_, long long a5_, long long a6_
) | 145 long long a1, |
| 111 { | 146 long long a2, |
| 112 » unsigned long ret; | 147 long long a3, |
| 113 » register long long a4 __asm__("r10") = a4_; | 148 long long a4_, |
| 114 » register long long a5 __asm__("r8") = a5_; | 149 long long a5_, |
| 115 » register long long a6 __asm__("r9") = a6_; | 150 long long a6_) { |
| 116 » struct __timespec_kernel ts[2]; | 151 unsigned long ret; |
| 117 » switch (n) { | 152 register long long a4 __asm__("r10") = a4_; |
| 118 » » __fixup_case_2; | 153 register long long a5 __asm__("r8") = a5_; |
| 119 » » __fixup_case_3; | 154 register long long a6 __asm__("r9") = a6_; |
| 120 » » __fixup_case_4; | 155 struct __timespec_kernel ts[2]; |
| 121 » » __fixup_case_5; | 156 switch (n) { |
| 122 » } | 157 __fixup_case_2; |
| 123 » __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), | 158 __fixup_case_3; |
| 124 » » » » » "d"(a3), "r"(a4), "r"(a5), "r"(a6) : "
rcx", "r11", "memory"); | 159 __fixup_case_4; |
| 125 » return ret; | 160 __fixup_case_5; |
| 161 } |
| 162 __asm__ __volatile__("syscall" |
| 163 : "=a"(ret) |
| 164 : "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(a4), "r"(a5), |
| 165 "r"(a6) |
| 166 : "rcx", "r11", "memory"); |
| 167 return ret; |
| 126 } | 168 } |
| OLD | NEW |