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1 #define a_ll a_ll | 1 #define a_ll a_ll |
2 static inline int a_ll(volatile int *p) | 2 static inline int a_ll(volatile int* p) { |
3 { | 3 int v; |
4 » int v; | 4 __asm__ __volatile__("lwarx %0, 0, %2" : "=r"(v) : "m"(*p), "r"(p)); |
5 » __asm__ __volatile__ ("lwarx %0, 0, %2" : "=r"(v) : "m"(*p), "r"(p)); | 5 return v; |
6 » return v; | |
7 } | 6 } |
8 | 7 |
9 #define a_sc a_sc | 8 #define a_sc a_sc |
10 static inline int a_sc(volatile int *p, int v) | 9 static inline int a_sc(volatile int* p, int v) { |
11 { | 10 int r; |
12 » int r; | 11 __asm__ __volatile__("stwcx. %2, 0, %3 ; mfcr %0" |
13 » __asm__ __volatile__ ( | 12 : "=r"(r), "=m"(*p) |
14 » » "stwcx. %2, 0, %3 ; mfcr %0" | 13 : "r"(v), "r"(p) |
15 » » : "=r"(r), "=m"(*p) : "r"(v), "r"(p) : "memory", "cc"); | 14 : "memory", "cc"); |
16 » return r & 0x20000000; /* "bit 2" of "cr0" (backwards bit order) */ | 15 return r & 0x20000000; /* "bit 2" of "cr0" (backwards bit order) */ |
17 } | 16 } |
18 | 17 |
19 #define a_barrier a_barrier | 18 #define a_barrier a_barrier |
20 static inline void a_barrier() | 19 static inline void a_barrier() { |
21 { | 20 __asm__ __volatile__("sync" : : : "memory"); |
22 » __asm__ __volatile__ ("sync" : : : "memory"); | |
23 } | 21 } |
24 | 22 |
25 #define a_pre_llsc a_barrier | 23 #define a_pre_llsc a_barrier |
26 | 24 |
27 #define a_post_llsc a_post_llsc | 25 #define a_post_llsc a_post_llsc |
28 static inline void a_post_llsc() | 26 static inline void a_post_llsc() { |
29 { | 27 __asm__ __volatile__("isync" : : : "memory"); |
30 » __asm__ __volatile__ ("isync" : : : "memory"); | |
31 } | 28 } |
32 | 29 |
33 #define a_store a_store | 30 #define a_store a_store |
34 static inline void a_store(volatile int *p, int v) | 31 static inline void a_store(volatile int* p, int v) { |
35 { | 32 a_pre_llsc(); |
36 » a_pre_llsc(); | 33 *p = v; |
37 » *p = v; | 34 a_post_llsc(); |
38 » a_post_llsc(); | |
39 } | 35 } |
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