MIPS64: Fix 'MIPS: use DAHI/DATH for li macro on mips64r6.'

src/mips64/macro-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/base/division-by-constant.h"
 #include "src/bootstrapper.h"
@@ skipping 1340 matching lines @@
     if (isolate()->heap()->InNewSpace(*value)) {
       Handle<Cell> cell = isolate()->factory()->NewCell(value);
       li(dst, Operand(cell));
       ld(dst, FieldMemOperand(dst, Cell::kValueOffset));
     } else {
       li(dst, Operand(value));
     }
   }
 }
 
+static inline int64_t ShiftAndFixSignExtension(int64_t imm, int bitnum) {
+  if ((imm >> (bitnum - 1)) & 0x1) {
+    imm = (imm >> bitnum) + 1;
+  } else {
+    imm = imm >> bitnum;
+  }
+  return imm;
+}
+
+void MacroAssembler::LiLower32BitHelper(Register rd, Operand j) {
+  if (is_int16(j.imm64_)) {
+    daddiu(rd, zero_reg, (j.imm64_ & kImm16Mask));
+  } else if (!(j.imm64_ & kHiMask)) {
+    ori(rd, zero_reg, (j.imm64_ & kImm16Mask));
+  } else if (!(j.imm64_ & kImm16Mask)) {
+    lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
+  } else {
+    lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
+    ori(rd, rd, (j.imm64_ & kImm16Mask));
+  }
+}
 
 void MacroAssembler::li(Register rd, Operand j, LiFlags mode) {
   DCHECK(!j.is_reg());
   BlockTrampolinePoolScope block_trampoline_pool(this);
   if (!MustUseReg(j.rmode_) && mode == OPTIMIZE_SIZE) {
     // Normal load of an immediate value which does not need Relocation Info.
     if (is_int32(j.imm64_)) {
-      if (is_int16(j.imm64_)) {
-        daddiu(rd, zero_reg, (j.imm64_ & kImm16Mask));
-      } else if (!(j.imm64_ & kHiMask)) {
-        ori(rd, zero_reg, (j.imm64_ & kImm16Mask));
-      } else if (!(j.imm64_ & kImm16Mask)) {
-        lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
-      } else {
-        lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
-        ori(rd, rd, (j.imm64_ & kImm16Mask));
-      }
+      LiLower32BitHelper(rd, j);
     } else {
       if (kArchVariant == kMips64r6) {
         int64_t imm = j.imm64_;
-        bool lui_emited = false;
-        if (((imm >> kLuiShift) & kImm16Mask) != 0) {
-          lui(rd, (imm >> kLuiShift) & kImm16Mask);
-          lui_emited = true;
-        }
-        if ((imm & kImm16Mask) != 0) {
-          ori(rd, rd, (imm & kImm16Mask));
-        } else if (!lui_emited) {
-          or_(rd, zero_reg, zero_reg);
-        }
-        if ((imm >> 31) & 0x1) {
-          imm = (imm >> 32) + 1;
-        } else {
-          imm = imm >> 32;
-        }
+        LiLower32BitHelper(rd, j);
+        imm = ShiftAndFixSignExtension(imm, 32);
         if (imm & kImm16Mask) {
           dahi(rd, imm & kImm16Mask);
         }
         if (!is_int48(j.imm64_)) {
-          if ((imm >> 15) & 0x1) {
-            imm = (imm >> 16) + 1;
-          } else {
-            imm = imm >> 16;
-          }
+          imm = ShiftAndFixSignExtension(imm, 16);
           if (imm & kImm16Mask) {
             dati(rd, imm & kImm16Mask);
           }
         }
       } else {
         if (is_int48(j.imm64_)) {
           if ((j.imm64_ >> 32) & kImm16Mask) {
             lui(rd, (j.imm64_ >> 32) & kImm16Mask);
             if ((j.imm64_ >> 16) & kImm16Mask) {
               ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
@@ skipping 5246 matching lines @@
   if (mag.shift > 0) sra(result, result, mag.shift);
   srl(at, dividend, 31);
   Addu(result, result, Operand(at));
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS64