Enables language tests for SIMMIPS.

runtime/vm/intrinsifier_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intrinsifier.h"
 
 #include "vm/assembler.h"
@@ skipping 91 matching lines @@
   __ StoreIntoObjectNoBarrier(T0,
                               FieldAddress(T0, Array::type_arguments_offset()),
                               T2);
 
   // Set the length field.
   __ lw(T2, Address(SP, kArrayLengthOffset));  // Array Length.
   __ StoreIntoObjectNoBarrier(T0,
                               FieldAddress(T0, Array::length_offset()),
                               T2);
 
+  __ LoadImmediate(T7, reinterpret_cast<int32_t>(Object::null()));
   // Initialize all array elements to raw_null.
   // T0: new object start as a tagged pointer.
   // T1: new object end address.
   // T2: iterator which initially points to the start of the variable
   // data area to be initialized.
-  // NULLREG: null
+  // T7: null
   __ AddImmediate(T2, T0, sizeof(RawArray) - kHeapObjectTag);
 
   Label done;
   Label init_loop;
   __ Bind(&init_loop);
   __ BranchUnsignedGreaterEqual(T2, T1, &done);
-  __ sw(NULLREG, Address(T2, 0));
+  __ sw(T7, Address(T2, 0));
   __ b(&init_loop);
   __ delay_slot()->addiu(T2, T2, Immediate(kWordSize));
   __ Bind(&done);
 
   __ Ret();  // Returns the newly allocated object in V0.
   __ delay_slot()->mov(V0, T0);
   __ Bind(&fall_through);
   return false;
 }
 
@@ skipping 59 matching lines @@
   Label fall_through;
 
   if (FLAG_enable_type_checks) {
     const intptr_t type_args_field_offset =
         ComputeObjectArrayTypeArgumentsOffset();
     // Inline simple tests (Smi, null), fallthrough if not positive.
     Label checked_ok;
     __ lw(T2, Address(SP, 0 * kWordSize));  // Value.
 
     // Null value is valid for any type.
-    __ beq(T2, NULLREG, &checked_ok);
+    __ LoadImmediate(T7, reinterpret_cast<int32_t>(Object::null()));
+    __ beq(T2, T7, &checked_ok);
     __ delay_slot()->lw(T1, Address(SP, 2 * kWordSize));  // Array.
 
     __ lw(T1, FieldAddress(T1, type_args_field_offset));
 
     // T1: Type arguments of array.
-    __ beq(T1, NULLREG, &checked_ok);
+    __ beq(T1, T7, &checked_ok);
 
     // Check if it's dynamic.
     // For now handle only TypeArguments and bail out if InstantiatedTypeArgs.
     __ LoadClassId(TMP, T1);
     __ BranchNotEqual(TMP, kTypeArgumentsCid, &fall_through);
 
     // Get type at index 0.
     __ lw(T0, FieldAddress(T1, TypeArguments::type_at_offset(0)));
     __ BranchEqual(T0, Type::ZoneHandle(Type::DynamicType()), &checked_ok);
 
@@ skipping 234 matching lines @@
   // len = len + 1;
   __ addiu(T3, T1, Immediate(value_one));
   __ sw(T3, FieldAddress(T0, GrowableObjectArray::length_offset()));
   __ lw(T0, Address(SP, 0 * kWordSize));  // Value.
   ASSERT(kSmiTagShift == 1);
   __ sll(T1, T1, 1);
   __ addu(T1, T2, T1);
   __ StoreIntoObject(T2,
                      FieldAddress(T1, Array::data_offset()),
                      T0);
+  __ LoadImmediate(T7, reinterpret_cast<int32_t>(Object::null()));
   __ Ret();
-  __ delay_slot()->mov(V0, NULLREG);
+  __ delay_slot()->mov(V0, T7);
   __ Bind(&fall_through);
   return false;
 }
 
 
 #define TYPED_ARRAY_ALLOCATION(type_name, cid, max_len, scale_shift)           \
   Label fall_through;                                                          \
   const intptr_t kArrayLengthStackOffset = 0 * kWordSize;                      \
   __ lw(T2, Address(SP, kArrayLengthStackOffset));  /* Array length. */        \
   /* Check that length is a positive Smi. */                                   \
@@ skipping 352 matching lines @@
 }
 
 
 bool Intrinsifier::Integer_bitOr(Assembler* assembler) {
   return Integer_bitOrFromInteger(assembler);
 }
 
 
 bool Intrinsifier::Integer_bitXorFromInteger(Assembler* assembler) {
   Label fall_through;
-  __ Untested("Intrinsifier::Integer_bitXorFromInteger");
 
   TestBothArgumentsSmis(assembler, &fall_through);  // Checks two smis.
   __ Ret();
   __ delay_slot()->xor_(V0, T0, T1);
   __ Bind(&fall_through);
   return false;
 }
 
 
 bool Intrinsifier::Integer_bitXor(Assembler* assembler) {
@@ skipping 281 matching lines @@
   __ BranchNotEqual(TMP, kDoubleCid, not_double_smi);
   // Fall through with Double in T0.
 }
 
 
 // Both arguments on stack, arg0 (left) is a double, arg1 (right) is of unknown
 // type. Return true or false object in the register V0. Any NaN argument
 // returns false. Any non-double arg1 causes control flow to fall through to the
 // slow case (compiled method body).
 static bool CompareDoubles(Assembler* assembler, Condition true_condition) {
-  Label is_smi, no_conversion, no_NaN, fall_through;
+  Label is_smi, double_op, no_NaN, fall_through;
+  __ Comment("CompareDoubles Intrinsic");
 
   TestLastArgumentIsDouble(assembler, &is_smi, &fall_through);
   // Both arguments are double, right operand is in T0.
-  __ lwc1(F2, FieldAddress(T0, Double::value_offset()));
-  __ b(&no_conversion);
-  __ delay_slot()->lwc1(F3,
-      FieldAddress(T0, Double::value_offset() + kWordSize));
-
-  __ Bind(&is_smi);
-  __ SmiUntag(T0);
-  __ mtc1(T0, F4);
-  __ cvtdw(D1, F4);
-
-  __ Bind(&no_conversion);
+  __ LoadDFromOffset(D1, T0, Double::value_offset() - kHeapObjectTag);
+  __ Bind(&double_op);
   __ lw(T0, Address(SP, 1 * kWordSize));  // Left argument.
-  __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
-  __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
+  __ LoadDFromOffset(D0, T0, Double::value_offset() - kHeapObjectTag);
   // Now, left is in D0, right is in D1.
 
   __ cund(D0, D1);  // Check for NaN.
   __ bc1f(&no_NaN);
   __ LoadObject(V0, Bool::False());  // Return false if either is NaN.
   __ Ret();
   __ Bind(&no_NaN);
 
   switch (true_condition) {
-    case EQ: __ ceqd(D1, D0); break;
-    case LT: __ coltd(D1, D0); break;
-    case LE: __ coled(D1, D0); break;
-    case GT: __ coltd(D0, D1); break;
-    case GE: __ coled(D0, D1); break;
+    case EQ: __ ceqd(D0, D1); break;
+    case LT: __ coltd(D0, D1); break;
+    case LE: __ coled(D0, D1); break;
+    case GT: __ coltd(D1, D0); break;
+    case GE: __ coled(D1, D0); break;
     default: {
       // Only passing the above conditions to this function.
       UNREACHABLE();
       break;
     }
   }
 
   Label is_true;
   __ bc1t(&is_true);
   __ LoadObject(V0, Bool::False());
   __ Ret();
   __ Bind(&is_true);
   __ LoadObject(V0, Bool::True());
   __ Ret();
+
+
+  __ Bind(&is_smi);
+  __ SmiUntag(T0);
+  __ mtc1(T0, STMP1);
+  __ cvtdw(D1, STMP1);
+  __ b(&double_op);
+
   __ Bind(&fall_through);
   return false;
 }
 
 
 bool Intrinsifier::Double_greaterThan(Assembler* assembler) {
   return CompareDoubles(assembler, GT);
 }
 
 
@@ skipping 64 matching lines @@
 
 
 bool Intrinsifier::Double_div(Assembler* assembler) {
   return DoubleArithmeticOperations(assembler, Token::kDIV);
 }
 
 
 // Left is double right is integer (Bigint, Mint or Smi)
 bool Intrinsifier::Double_mulFromInteger(Assembler* assembler) {
   Label fall_through;
-  __ Untested("Intrinsifier::Double_mulFromInteger");
   // Only Smi-s allowed.
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ andi(CMPRES, T0, Immediate(kSmiTagMask));
   __ bne(CMPRES, ZR, &fall_through);
 
   // Is Smi.
   __ SmiUntag(T0);
   __ mtc1(T0, F4);
   __ cvtdw(D1, F4);
 
@@ skipping 31 matching lines @@
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
   __ Bind(&fall_through);
   return false;
 }
 
 
 bool Intrinsifier::Double_getIsNaN(Assembler* assembler) {
   Label is_true;
-  __ Untested("Intrinsifier::Double_getIsNaN");
+
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
   __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
   __ cund(D0, D0);  // Check for NaN.
   __ bc1t(&is_true);
   __ LoadObject(V0, Bool::False());  // Return false if either is NaN.
   __ Ret();
   __ Bind(&is_true);
   __ LoadObject(V0, Bool::True());
   __ Ret();
   return true;
 }
 
 
 bool Intrinsifier::Double_getIsNegative(Assembler* assembler) {
   Label is_false, is_true, is_zero;
-  __ Untested("Intrinsifier::Double_getIsNegative");
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
   __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
 
   __ cund(D0, D0);
   __ bc1t(&is_false);  // NaN -> false.
 
   __ ceqd(D0, D1);
   __ bc1t(&is_zero);  // Check for negative zero.
 
@@ skipping 32 matching lines @@
   __ BranchSignedLess(V0, 0xC0000000, &fall_through);
   __ Ret();
   __ delay_slot()->SmiTag(V0);
   __ Bind(&fall_through);
   return false;
 }
 
 
 bool Intrinsifier::Math_sqrt(Assembler* assembler) {
   Label fall_through, is_smi, double_op;
-  __ Untested("Intrinsifier::Math_sqrt");
   TestLastArgumentIsDouble(assembler, &is_smi, &fall_through);
   // Argument is double and is in T0.
-  __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
-  __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
+  __ LoadDFromOffset(D1, T0, Double::value_offset() - kHeapObjectTag);
   __ Bind(&double_op);
   __ sqrtd(D0, D1);
   const Class& double_class = Class::Handle(
       Isolate::Current()->object_store()->double_class());
   __ TryAllocate(double_class, &fall_through, V0);  // Result register.
   __ swc1(F0, FieldAddress(V0, Double::value_offset()));
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
 
@@ skipping 32 matching lines @@
   const Field& random_A_field = Field::ZoneHandle(
       random_class.LookupStaticField(Symbols::_A()));
   ASSERT(!random_A_field.IsNull());
   ASSERT(random_A_field.is_const());
   const Instance& a_value = Instance::Handle(random_A_field.value());
   const int64_t a_int_value = Integer::Cast(a_value).AsInt64Value();
   // 'a_int_value' is a mask.
   ASSERT(Utils::IsUint(32, a_int_value));
   int32_t a_int32_value = static_cast<int32_t>(a_int_value);
 
-  __ Untested("Random_nextState");
-
   __ lw(T0, Address(SP, 0 * kWordSize));  // Receiver.
   __ lw(T1, FieldAddress(T0, state_field.Offset()));  // Field '_state'.
 
   // Addresses of _state[0] and _state[1].
   const int64_t disp_0 =
       FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid);
 
   const int64_t disp_1 =
       FlowGraphCompiler::ElementSizeFor(kTypedDataUint32ArrayCid) +
       FlowGraphCompiler::DataOffsetFor(kTypedDataUint32ArrayCid);
@@ skipping 310 matching lines @@
   __ Bind(&ok);
   __ Ret();
 
   __ Bind(&fall_through);
   return false;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS