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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
| 7 | 7 |
| 8 #include "vm/cpu.h" | 8 #include "vm/cpu.h" |
| 9 #include "vm/debugger.h" | 9 #include "vm/debugger.h" |
| 10 #include "vm/instructions.h" | 10 #include "vm/instructions.h" |
| (...skipping 30 matching lines...) Expand all Loading... |
| 41 | 41 |
| 42 | 42 |
| 43 void CodeBreakpoint::PatchFunctionReturn() { | 43 void CodeBreakpoint::PatchFunctionReturn() { |
| 44 Instr* instr1 = Instr::At(pc_ - 5 * Instr::kInstrSize); | 44 Instr* instr1 = Instr::At(pc_ - 5 * Instr::kInstrSize); |
| 45 Instr* instr2 = Instr::At(pc_ - 4 * Instr::kInstrSize); | 45 Instr* instr2 = Instr::At(pc_ - 4 * Instr::kInstrSize); |
| 46 Instr* instr3 = Instr::At(pc_ - 3 * Instr::kInstrSize); | 46 Instr* instr3 = Instr::At(pc_ - 3 * Instr::kInstrSize); |
| 47 Instr* instr4 = Instr::At(pc_ - 2 * Instr::kInstrSize); | 47 Instr* instr4 = Instr::At(pc_ - 2 * Instr::kInstrSize); |
| 48 Instr* instr5 = Instr::At(pc_ - 1 * Instr::kInstrSize); | 48 Instr* instr5 = Instr::At(pc_ - 1 * Instr::kInstrSize); |
| 49 | 49 |
| 50 #if defined(DEBUG) | 50 #if defined(DEBUG) |
| 51 | |
| 52 instr1->AssertIsImmInstr(LW, SP, RA, 2 * kWordSize); | 51 instr1->AssertIsImmInstr(LW, SP, RA, 2 * kWordSize); |
| 53 instr2->AssertIsImmInstr(LW, SP, FP, 1 * kWordSize); | 52 instr2->AssertIsImmInstr(LW, SP, FP, 1 * kWordSize); |
| 54 instr3->AssertIsImmInstr(LW, SP, PP, 0 * kWordSize); | 53 instr3->AssertIsImmInstr(LW, SP, PP, 0 * kWordSize); |
| 55 instr4->AssertIsSpecialInstr(JR, RA, ZR, ZR); | 54 instr4->AssertIsSpecialInstr(JR, RA, ZR, ZR); |
| 56 instr5->AssertIsImmInstr(ADDIU, SP, SP, 4 * kWordSize); | 55 instr5->AssertIsImmInstr(ADDIU, SP, SP, 4 * kWordSize); |
| 57 #endif // defined(DEBUG) | 56 #endif // defined(DEBUG) |
| 58 | 57 |
| 59 // Smash code with call instruction and target address. | 58 // Smash code with call instruction and target address. |
| 60 uword stub_addr = StubCode::BreakpointReturnEntryPoint(); | 59 uword stub_addr = StubCode::BreakpointReturnEntryPoint(); |
| 61 uint16_t target_lo = stub_addr & 0xffff; | 60 uint16_t target_lo = stub_addr & 0xffff; |
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| 88 instr3->SetImmInstrBits(LW, SP, PP, 0 * kWordSize); | 87 instr3->SetImmInstrBits(LW, SP, PP, 0 * kWordSize); |
| 89 instr4->SetSpecialInstrBits(JR, RA, ZR, ZR); | 88 instr4->SetSpecialInstrBits(JR, RA, ZR, ZR); |
| 90 instr5->SetImmInstrBits(ADDIU, SP, SP, 4 * kWordSize); | 89 instr5->SetImmInstrBits(ADDIU, SP, SP, 4 * kWordSize); |
| 91 | 90 |
| 92 CPU::FlushICache(pc_ - 5 * Instr::kInstrSize, 5 * Instr::kInstrSize); | 91 CPU::FlushICache(pc_ - 5 * Instr::kInstrSize, 5 * Instr::kInstrSize); |
| 93 } | 92 } |
| 94 | 93 |
| 95 } // namespace dart | 94 } // namespace dart |
| 96 | 95 |
| 97 #endif // defined TARGET_ARCH_MIPS | 96 #endif // defined TARGET_ARCH_MIPS |
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