| OLD | NEW |
| 1 /* | 1 /* |
| 2 * x86 feature check | 2 * x86 feature check |
| 3 * | 3 * |
| 4 * Copyright (C) 2013 Intel Corporation. All rights reserved. | 4 * Copyright (C) 2013 Intel Corporation. All rights reserved. |
| 5 * Author: | 5 * Author: |
| 6 * Jim Kukunas | 6 * Jim Kukunas |
| 7 * | 7 * |
| 8 * For conditions of distribution and use, see copyright notice in zlib.h | 8 * For conditions of distribution and use, see copyright notice in zlib.h |
| 9 */ | 9 */ |
| 10 | 10 |
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| 49 x86_cpu_has_sse42 = ecx & 0x100000; | 49 x86_cpu_has_sse42 = ecx & 0x100000; |
| 50 x86_cpu_has_pclmulqdq = ecx & 0x2; | 50 x86_cpu_has_pclmulqdq = ecx & 0x2; |
| 51 | 51 |
| 52 x86_cpu_enable_simd = x86_cpu_has_sse2 && | 52 x86_cpu_enable_simd = x86_cpu_has_sse2 && |
| 53 x86_cpu_has_sse42 && | 53 x86_cpu_has_sse42 && |
| 54 x86_cpu_has_pclmulqdq; | 54 x86_cpu_has_pclmulqdq; |
| 55 } | 55 } |
| 56 #else | 56 #else |
| 57 #include <intrin.h> | 57 #include <intrin.h> |
| 58 #include <windows.h> | 58 #include <windows.h> |
| 59 #include <stdint.h> | |
| 60 | 59 |
| 61 static volatile int32_t once_control = 0; | 60 static BOOL CALLBACK _x86_check_features(PINIT_ONCE once, |
| 62 static void _x86_check_features(void); | 61 PVOID param, |
| 63 static int fake_pthread_once(volatile int32_t *once_control, | 62 PVOID *context); |
| 64 void (*init_routine)(void)); | 63 static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT; |
| 65 | 64 |
| 66 void x86_check_features(void) | 65 void x86_check_features(void) |
| 67 { | 66 { |
| 68 fake_pthread_once(&once_control, _x86_check_features); | 67 InitOnceExecuteOnce(&cpu_check_inited_once, _x86_check_features, |
| 68 NULL, NULL); |
| 69 } | 69 } |
| 70 | 70 |
| 71 /* Copied from "perftools_pthread_once" in tcmalloc */ | 71 static BOOL CALLBACK _x86_check_features(PINIT_ONCE once, |
| 72 static int fake_pthread_once(volatile int32_t *once_control, | 72 PVOID param, |
| 73 void (*init_routine)(void)) { | 73 PVOID *context) |
| 74 // Try for a fast path first. Note: this should be an acquire semantics read | |
| 75 // It is on x86 and x64, where Windows runs. | |
| 76 if (*once_control != 1) { | |
| 77 while (1) { | |
| 78 switch (InterlockedCompareExchange(once_control, 2, 0)) { | |
| 79 case 0: | |
| 80 init_routine(); | |
| 81 InterlockedExchange(once_control, 1); | |
| 82 return 0; | |
| 83 case 1: | |
| 84 // The initializer has already been executed | |
| 85 return 0; | |
| 86 default: | |
| 87 // The initializer is being processed by another thread | |
| 88 SwitchToThread(); | |
| 89 } | |
| 90 } | |
| 91 } | |
| 92 return 0; | |
| 93 } | |
| 94 | |
| 95 static void _x86_check_features(void) | |
| 96 { | 74 { |
| 97 int x86_cpu_has_sse2; | 75 int x86_cpu_has_sse2; |
| 98 int x86_cpu_has_sse42; | 76 int x86_cpu_has_sse42; |
| 99 int x86_cpu_has_pclmulqdq; | 77 int x86_cpu_has_pclmulqdq; |
| 100 int regs[4]; | 78 int regs[4]; |
| 101 | 79 |
| 102 __cpuid(regs, 1); | 80 __cpuid(regs, 1); |
| 103 | 81 |
| 104 x86_cpu_has_sse2 = regs[3] & 0x4000000; | 82 x86_cpu_has_sse2 = regs[3] & 0x4000000; |
| 105 x86_cpu_has_sse42= regs[2] & 0x100000; | 83 x86_cpu_has_sse42= regs[2] & 0x100000; |
| 106 x86_cpu_has_pclmulqdq = regs[2] & 0x2; | 84 x86_cpu_has_pclmulqdq = regs[2] & 0x2; |
| 107 | 85 |
| 108 x86_cpu_enable_simd = x86_cpu_has_sse2 && | 86 x86_cpu_enable_simd = x86_cpu_has_sse2 && |
| 109 x86_cpu_has_sse42 && | 87 x86_cpu_has_sse42 && |
| 110 x86_cpu_has_pclmulqdq; | 88 x86_cpu_has_pclmulqdq; |
| 89 return TRUE; |
| 111 } | 90 } |
| 112 #endif /* _MSC_VER */ | 91 #endif /* _MSC_VER */ |
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