| Index: src/compiler/mips/instruction-codes-mips.h
|
| diff --git a/src/compiler/mips/instruction-codes-mips.h b/src/compiler/mips/instruction-codes-mips.h
|
| index f0ea4637741f74852f098cca6fc141d0a56efee6..b9849ab5512462e395b2c897678d58d918c3478e 100644
|
| --- a/src/compiler/mips/instruction-codes-mips.h
|
| +++ b/src/compiler/mips/instruction-codes-mips.h
|
| @@ -81,6 +81,7 @@ namespace compiler {
|
| V(MipsCvtDW) \
|
| V(MipsCvtDUw) \
|
| V(MipsCvtSW) \
|
| + V(MipsCvtSUw) \
|
| V(MipsLb) \
|
| V(MipsLbu) \
|
| V(MipsSb) \
|
| @@ -105,7 +106,6 @@ namespace compiler {
|
| V(MipsStoreToStackSlot) \
|
| V(MipsStackClaim)
|
|
|
| -
|
| // Addressing modes represent the "shape" of inputs to an instruction.
|
| // Many instructions support multiple addressing modes. Addressing modes
|
| // are encoded into the InstructionCode of the instruction and tell the
|
|
|