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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 6 | 6 |
| 7 #if V8_TARGET_ARCH_MIPS64 | 7 #if V8_TARGET_ARCH_MIPS64 |
| 8 | 8 |
| 9 #include "src/base/division-by-constant.h" | 9 #include "src/base/division-by-constant.h" |
| 10 #include "src/bootstrapper.h" | 10 #include "src/bootstrapper.h" |
| (...skipping 1634 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 1645 add_d(fd, fd, fd); // In delay slot. | 1645 add_d(fd, fd, fd); // In delay slot. |
| 1646 | 1646 |
| 1647 bind(&msb_clear); | 1647 bind(&msb_clear); |
| 1648 // Rs < 2^63, we can do simple conversion. | 1648 // Rs < 2^63, we can do simple conversion. |
| 1649 dmtc1(rs, fd); | 1649 dmtc1(rs, fd); |
| 1650 cvt_d_l(fd, fd); | 1650 cvt_d_l(fd, fd); |
| 1651 | 1651 |
| 1652 bind(&conversion_done); | 1652 bind(&conversion_done); |
| 1653 } | 1653 } |
| 1654 | 1654 |
| 1655 void MacroAssembler::Cvt_s_uw(FPURegister fd, FPURegister fs) { | |
| 1656 // Move the data from fs to t8. | |
| 1657 mfc1(t8, fs); | |
| 1658 Cvt_s_uw(fd, t8); | |
| 1659 } | |
| 1660 | |
| 1661 void MacroAssembler::Cvt_s_uw(FPURegister fd, Register rs) { | |
| 1662 // Convert rs to a FP value in fd. | |
|
Ilija.Pavlovic1
2016/02/18 08:44:35
Maybe more descriptive comment as: "Convert unsign
| |
| 1663 DCHECK(!rs.is(t9)); | |
| 1664 DCHECK(!rs.is(at)); | |
| 1665 | |
| 1666 // Zero extend int32 in rs. | |
| 1667 Dext(t9, rs, 0, 32); | |
| 1668 dmtc1(t9, fd); | |
| 1669 cvt_s_l(fd, fd); | |
| 1670 } | |
| 1655 | 1671 |
| 1656 void MacroAssembler::Cvt_s_ul(FPURegister fd, FPURegister fs) { | 1672 void MacroAssembler::Cvt_s_ul(FPURegister fd, FPURegister fs) { |
| 1657 // Move the data from fs to t8. | 1673 // Move the data from fs to t8. |
| 1658 dmfc1(t8, fs); | 1674 dmfc1(t8, fs); |
| 1659 Cvt_s_ul(fd, t8); | 1675 Cvt_s_ul(fd, t8); |
| 1660 } | 1676 } |
| 1661 | 1677 |
| 1662 | 1678 |
| 1663 void MacroAssembler::Cvt_s_ul(FPURegister fd, Register rs) { | 1679 void MacroAssembler::Cvt_s_ul(FPURegister fd, Register rs) { |
| 1664 // Convert rs to a FP value in fd. | 1680 // Convert rs to a FP value in fd. |
| (...skipping 4882 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 6547 if (mag.shift > 0) sra(result, result, mag.shift); | 6563 if (mag.shift > 0) sra(result, result, mag.shift); |
| 6548 srl(at, dividend, 31); | 6564 srl(at, dividend, 31); |
| 6549 Addu(result, result, Operand(at)); | 6565 Addu(result, result, Operand(at)); |
| 6550 } | 6566 } |
| 6551 | 6567 |
| 6552 | 6568 |
| 6553 } // namespace internal | 6569 } // namespace internal |
| 6554 } // namespace v8 | 6570 } // namespace v8 |
| 6555 | 6571 |
| 6556 #endif // V8_TARGET_ARCH_MIPS64 | 6572 #endif // V8_TARGET_ARCH_MIPS64 |
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