| OLD | NEW |
| 1 //===- subzero/crosstest/test_calling_conv.cpp - Implementation for tests -===// | 1 //===- subzero/crosstest/test_calling_conv.cpp - Implementation for tests -===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file defines the test functions used to check that Subzero | 10 // This file defines the test functions used to check that Subzero |
| (...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 59 case ARGNUM: \ | 59 case ARGNUM: \ |
| 60 memcpy(&Buf[0], &arg##ARGNUM, sizeof(arg##ARGNUM)); \ | 60 memcpy(&Buf[0], &arg##ARGNUM, sizeof(arg##ARGNUM)); \ |
| 61 break; | 61 break; |
| 62 | 62 |
| 63 void __attribute__((noinline)) callee_i(int arg1) { | 63 void __attribute__((noinline)) callee_i(int arg1) { |
| 64 switch (ArgNum) { HANDLE_ARG(1); } | 64 switch (ArgNum) { HANDLE_ARG(1); } |
| 65 } | 65 } |
| 66 | 66 |
| 67 void __attribute__((noinline)) | 67 void __attribute__((noinline)) |
| 68 callee_vvvvv(v4si32 arg1, v4si32 arg2, v4si32 arg3, v4si32 arg4, v4si32 arg5) { | 68 callee_vvvvv(v4si32 arg1, v4si32 arg2, v4si32 arg3, v4si32 arg4, v4si32 arg5) { |
| 69 #ifndef ARM32 | |
| 70 // TODO(jpp): remove this once vector support is implemented. | |
| 71 switch (ArgNum) { | 69 switch (ArgNum) { |
| 72 HANDLE_ARG(1); | 70 HANDLE_ARG(1); |
| 73 HANDLE_ARG(2); | 71 HANDLE_ARG(2); |
| 74 HANDLE_ARG(3); | 72 HANDLE_ARG(3); |
| 75 HANDLE_ARG(4); | 73 HANDLE_ARG(4); |
| 76 HANDLE_ARG(5); | 74 HANDLE_ARG(5); |
| 77 } | 75 } |
| 78 #endif // ARM32 | |
| 79 } | 76 } |
| 80 | 77 |
| 81 void __attribute__((noinline)) | 78 void __attribute__((noinline)) |
| 82 callee_vlvilvfvdviv(v4f32 arg1, int64 arg2, v4f32 arg3, int arg4, int64 arg5, | 79 callee_vlvilvfvdviv(v4f32 arg1, int64 arg2, v4f32 arg3, int arg4, int64 arg5, |
| 83 v4f32 arg6, float arg7, v4f32 arg8, double arg9, | 80 v4f32 arg6, float arg7, v4f32 arg8, double arg9, |
| 84 v4f32 arg10, int arg11, v4f32 arg12) { | 81 v4f32 arg10, int arg11, v4f32 arg12) { |
| 85 switch (ArgNum) { | 82 switch (ArgNum) { |
| 86 #ifndef ARM32 | |
| 87 // TODO(jpp): remove this once vector support is implemented. | |
| 88 HANDLE_ARG(1); | 83 HANDLE_ARG(1); |
| 89 HANDLE_ARG(3); | 84 HANDLE_ARG(3); |
| 90 HANDLE_ARG(6); | 85 HANDLE_ARG(6); |
| 91 HANDLE_ARG(8); | 86 HANDLE_ARG(8); |
| 92 HANDLE_ARG(10); | 87 HANDLE_ARG(10); |
| 93 HANDLE_ARG(12); | 88 HANDLE_ARG(12); |
| 94 #endif // ARM32 | |
| 95 HANDLE_ARG(2); | 89 HANDLE_ARG(2); |
| 96 HANDLE_ARG(4); | 90 HANDLE_ARG(4); |
| 97 HANDLE_ARG(5); | 91 HANDLE_ARG(5); |
| 98 HANDLE_ARG(7); | 92 HANDLE_ARG(7); |
| 99 HANDLE_ARG(9); | 93 HANDLE_ARG(9); |
| 100 HANDLE_ARG(11); | 94 HANDLE_ARG(11); |
| 101 } | 95 } |
| 102 } | 96 } |
| OLD | NEW |