| Index: src/compiler/mips64/instruction-codes-mips64.h
|
| diff --git a/src/compiler/mips64/instruction-codes-mips64.h b/src/compiler/mips64/instruction-codes-mips64.h
|
| index fbff3d78a3e646a0a34b549b0fd9a17da7c35bdd..9170c97845fe1a6d5f2d2c2a3e4cd9cc8837ee43 100644
|
| --- a/src/compiler/mips64/instruction-codes-mips64.h
|
| +++ b/src/compiler/mips64/instruction-codes-mips64.h
|
| @@ -97,6 +97,7 @@ namespace compiler {
|
| V(Mips64TruncLS) \
|
| V(Mips64TruncLD) \
|
| V(Mips64TruncUwD) \
|
| + V(Mips64TruncUwS) \
|
| V(Mips64TruncUlS) \
|
| V(Mips64TruncUlD) \
|
| V(Mips64CvtDW) \
|
| @@ -134,7 +135,6 @@ namespace compiler {
|
| V(Mips64StoreToStackSlot) \
|
| V(Mips64StackClaim)
|
|
|
| -
|
| // Addressing modes represent the "shape" of inputs to an instruction.
|
| // Many instructions support multiple addressing modes. Addressing modes
|
| // are encoded into the InstructionCode of the instruction and tell the
|
|
|