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Issue 1708853002: MIPS: [turbofan] Add TruncateFloat32ToUint32 operator to Turbofan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 10 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
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775 // MIPS32 R2 instruction macro. 775 // MIPS32 R2 instruction macro.
776 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 776 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
777 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 777 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
778 778
779 // --------------------------------------------------------------------------- 779 // ---------------------------------------------------------------------------
780 // FPU macros. These do not handle special cases like NaN or +- inf. 780 // FPU macros. These do not handle special cases like NaN or +- inf.
781 781
782 // Convert unsigned word to double. 782 // Convert unsigned word to double.
783 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch); 783 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
784 784
785 // Convert single to unsigned word.
786 void Trunc_uw_s(FPURegister fd, FPURegister fs, FPURegister scratch);
787 void Trunc_uw_s(FPURegister fd, Register rs, FPURegister scratch);
788
785 // Convert double to unsigned word. 789 // Convert double to unsigned word.
786 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch); 790 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
787 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch); 791 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
788 792
789 void Trunc_w_d(FPURegister fd, FPURegister fs); 793 void Trunc_w_d(FPURegister fd, FPURegister fs);
790 void Round_w_d(FPURegister fd, FPURegister fs); 794 void Round_w_d(FPURegister fd, FPURegister fs);
791 void Floor_w_d(FPURegister fd, FPURegister fs); 795 void Floor_w_d(FPURegister fd, FPURegister fs);
792 void Ceil_w_d(FPURegister fd, FPURegister fs); 796 void Ceil_w_d(FPURegister fd, FPURegister fs);
793 797
794 // FP32 mode: Move the general purpose register into 798 // FP32 mode: Move the general purpose register into
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1790 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1794 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1791 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1795 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1792 #else 1796 #else
1793 #define ACCESS_MASM(masm) masm-> 1797 #define ACCESS_MASM(masm) masm->
1794 #endif 1798 #endif
1795 1799
1796 } // namespace internal 1800 } // namespace internal
1797 } // namespace v8 1801 } // namespace v8
1798 1802
1799 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1803 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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