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1 | 1 |
2 // Copyright 2012 the V8 project authors. All rights reserved. | 2 // Copyright 2012 the V8 project authors. All rights reserved. |
3 // Use of this source code is governed by a BSD-style license that can be | 3 // Use of this source code is governed by a BSD-style license that can be |
4 // found in the LICENSE file. | 4 // found in the LICENSE file. |
5 | 5 |
6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
7 | 7 |
8 #if V8_TARGET_ARCH_MIPS | 8 #if V8_TARGET_ARCH_MIPS |
9 | 9 |
10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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1371 } | 1371 } |
1372 | 1372 |
1373 | 1373 |
1374 void MacroAssembler::Trunc_uw_d(FPURegister fd, | 1374 void MacroAssembler::Trunc_uw_d(FPURegister fd, |
1375 FPURegister fs, | 1375 FPURegister fs, |
1376 FPURegister scratch) { | 1376 FPURegister scratch) { |
1377 Trunc_uw_d(fs, t8, scratch); | 1377 Trunc_uw_d(fs, t8, scratch); |
1378 mtc1(t8, fd); | 1378 mtc1(t8, fd); |
1379 } | 1379 } |
1380 | 1380 |
| 1381 void MacroAssembler::Trunc_uw_s(FPURegister fd, FPURegister fs, |
| 1382 FPURegister scratch) { |
| 1383 Trunc_uw_s(fs, t8, scratch); |
| 1384 mtc1(t8, fd); |
| 1385 } |
1381 | 1386 |
1382 void MacroAssembler::Trunc_w_d(FPURegister fd, FPURegister fs) { | 1387 void MacroAssembler::Trunc_w_d(FPURegister fd, FPURegister fs) { |
1383 if (IsMipsArchVariant(kLoongson) && fd.is(fs)) { | 1388 if (IsMipsArchVariant(kLoongson) && fd.is(fs)) { |
1384 Mfhc1(t8, fs); | 1389 Mfhc1(t8, fs); |
1385 trunc_w_d(fd, fs); | 1390 trunc_w_d(fd, fs); |
1386 Mthc1(t8, fs); | 1391 Mthc1(t8, fs); |
1387 } else { | 1392 } else { |
1388 trunc_w_d(fd, fs); | 1393 trunc_w_d(fd, fs); |
1389 } | 1394 } |
1390 } | 1395 } |
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1448 Label done; | 1453 Label done; |
1449 Branch(&done); | 1454 Branch(&done); |
1450 // Simple conversion. | 1455 // Simple conversion. |
1451 bind(&simple_convert); | 1456 bind(&simple_convert); |
1452 trunc_w_d(scratch, fd); | 1457 trunc_w_d(scratch, fd); |
1453 mfc1(rs, scratch); | 1458 mfc1(rs, scratch); |
1454 | 1459 |
1455 bind(&done); | 1460 bind(&done); |
1456 } | 1461 } |
1457 | 1462 |
| 1463 void MacroAssembler::Trunc_uw_s(FPURegister fd, Register rs, |
| 1464 FPURegister scratch) { |
| 1465 DCHECK(!fd.is(scratch)); |
| 1466 DCHECK(!rs.is(at)); |
| 1467 |
| 1468 // Load 2^31 into scratch as its float representation. |
| 1469 li(at, 0x4F000000); |
| 1470 mtc1(at, scratch); |
| 1471 // Test if scratch > fd. |
| 1472 // If fd < 2^31 we can convert it normally. |
| 1473 Label simple_convert; |
| 1474 BranchF32(&simple_convert, NULL, lt, fd, scratch); |
| 1475 |
| 1476 // First we subtract 2^31 from fd, then trunc it to rs |
| 1477 // and add 2^31 to rs. |
| 1478 sub_s(scratch, fd, scratch); |
| 1479 trunc_w_s(scratch, scratch); |
| 1480 mfc1(rs, scratch); |
| 1481 Or(rs, rs, 1 << 31); |
| 1482 |
| 1483 Label done; |
| 1484 Branch(&done); |
| 1485 // Simple conversion. |
| 1486 bind(&simple_convert); |
| 1487 trunc_w_s(scratch, fd); |
| 1488 mfc1(rs, scratch); |
| 1489 |
| 1490 bind(&done); |
| 1491 } |
1458 | 1492 |
1459 void MacroAssembler::Mthc1(Register rt, FPURegister fs) { | 1493 void MacroAssembler::Mthc1(Register rt, FPURegister fs) { |
1460 if (IsFp32Mode()) { | 1494 if (IsFp32Mode()) { |
1461 mtc1(rt, fs.high()); | 1495 mtc1(rt, fs.high()); |
1462 } else { | 1496 } else { |
1463 DCHECK(IsFp64Mode() || IsFpxxMode()); | 1497 DCHECK(IsFp64Mode() || IsFpxxMode()); |
1464 DCHECK(IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)); | 1498 DCHECK(IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)); |
1465 mthc1(rt, fs); | 1499 mthc1(rt, fs); |
1466 } | 1500 } |
1467 } | 1501 } |
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5835 if (mag.shift > 0) sra(result, result, mag.shift); | 5869 if (mag.shift > 0) sra(result, result, mag.shift); |
5836 srl(at, dividend, 31); | 5870 srl(at, dividend, 31); |
5837 Addu(result, result, Operand(at)); | 5871 Addu(result, result, Operand(at)); |
5838 } | 5872 } |
5839 | 5873 |
5840 | 5874 |
5841 } // namespace internal | 5875 } // namespace internal |
5842 } // namespace v8 | 5876 } // namespace v8 |
5843 | 5877 |
5844 #endif // V8_TARGET_ARCH_MIPS | 5878 #endif // V8_TARGET_ARCH_MIPS |
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