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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
| 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
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| 71 V(MipsCvtDS) \ | 71 V(MipsCvtDS) \ |
| 72 V(MipsTruncWD) \ | 72 V(MipsTruncWD) \ |
| 73 V(MipsRoundWD) \ | 73 V(MipsRoundWD) \ |
| 74 V(MipsFloorWD) \ | 74 V(MipsFloorWD) \ |
| 75 V(MipsCeilWD) \ | 75 V(MipsCeilWD) \ |
| 76 V(MipsTruncWS) \ | 76 V(MipsTruncWS) \ |
| 77 V(MipsRoundWS) \ | 77 V(MipsRoundWS) \ |
| 78 V(MipsFloorWS) \ | 78 V(MipsFloorWS) \ |
| 79 V(MipsCeilWS) \ | 79 V(MipsCeilWS) \ |
| 80 V(MipsTruncUwD) \ | 80 V(MipsTruncUwD) \ |
| 81 V(MipsTruncUwS) \ |
| 81 V(MipsCvtDW) \ | 82 V(MipsCvtDW) \ |
| 82 V(MipsCvtDUw) \ | 83 V(MipsCvtDUw) \ |
| 83 V(MipsCvtSW) \ | 84 V(MipsCvtSW) \ |
| 84 V(MipsLb) \ | 85 V(MipsLb) \ |
| 85 V(MipsLbu) \ | 86 V(MipsLbu) \ |
| 86 V(MipsSb) \ | 87 V(MipsSb) \ |
| 87 V(MipsLh) \ | 88 V(MipsLh) \ |
| 88 V(MipsLhu) \ | 89 V(MipsLhu) \ |
| 89 V(MipsSh) \ | 90 V(MipsSh) \ |
| 90 V(MipsLw) \ | 91 V(MipsLw) \ |
| 91 V(MipsSw) \ | 92 V(MipsSw) \ |
| 92 V(MipsLwc1) \ | 93 V(MipsLwc1) \ |
| 93 V(MipsSwc1) \ | 94 V(MipsSwc1) \ |
| 94 V(MipsLdc1) \ | 95 V(MipsLdc1) \ |
| 95 V(MipsSdc1) \ | 96 V(MipsSdc1) \ |
| 96 V(MipsFloat64ExtractLowWord32) \ | 97 V(MipsFloat64ExtractLowWord32) \ |
| 97 V(MipsFloat64ExtractHighWord32) \ | 98 V(MipsFloat64ExtractHighWord32) \ |
| 98 V(MipsFloat64InsertLowWord32) \ | 99 V(MipsFloat64InsertLowWord32) \ |
| 99 V(MipsFloat64InsertHighWord32) \ | 100 V(MipsFloat64InsertHighWord32) \ |
| 100 V(MipsFloat64Max) \ | 101 V(MipsFloat64Max) \ |
| 101 V(MipsFloat64Min) \ | 102 V(MipsFloat64Min) \ |
| 102 V(MipsFloat32Max) \ | 103 V(MipsFloat32Max) \ |
| 103 V(MipsFloat32Min) \ | 104 V(MipsFloat32Min) \ |
| 104 V(MipsPush) \ | 105 V(MipsPush) \ |
| 105 V(MipsStoreToStackSlot) \ | 106 V(MipsStoreToStackSlot) \ |
| 106 V(MipsStackClaim) | 107 V(MipsStackClaim) |
| 107 | 108 |
| 108 | |
| 109 // Addressing modes represent the "shape" of inputs to an instruction. | 109 // Addressing modes represent the "shape" of inputs to an instruction. |
| 110 // Many instructions support multiple addressing modes. Addressing modes | 110 // Many instructions support multiple addressing modes. Addressing modes |
| 111 // are encoded into the InstructionCode of the instruction and tell the | 111 // are encoded into the InstructionCode of the instruction and tell the |
| 112 // code generator after register allocation which assembler method to call. | 112 // code generator after register allocation which assembler method to call. |
| 113 // | 113 // |
| 114 // We use the following local notation for addressing modes: | 114 // We use the following local notation for addressing modes: |
| 115 // | 115 // |
| 116 // R = register | 116 // R = register |
| 117 // O = register or stack slot | 117 // O = register or stack slot |
| 118 // D = double register | 118 // D = double register |
| 119 // I = immediate (handle, external, int32) | 119 // I = immediate (handle, external, int32) |
| 120 // MRI = [register + immediate] | 120 // MRI = [register + immediate] |
| 121 // MRR = [register + register] | 121 // MRR = [register + register] |
| 122 // TODO(plind): Add the new r6 address modes. | 122 // TODO(plind): Add the new r6 address modes. |
| 123 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 123 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
| 124 V(MRI) /* [%r0 + K] */ \ | 124 V(MRI) /* [%r0 + K] */ \ |
| 125 V(MRR) /* [%r0 + %r1] */ | 125 V(MRR) /* [%r0 + %r1] */ |
| 126 | 126 |
| 127 | 127 |
| 128 } // namespace compiler | 128 } // namespace compiler |
| 129 } // namespace internal | 129 } // namespace internal |
| 130 } // namespace v8 | 130 } // namespace v8 |
| 131 | 131 |
| 132 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 132 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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