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Issue 170783002: A64: Introduce 'branch types' that extend the architectural conditions. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: inline InvertBranchType Created 6 years, 10 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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659 if (!need_longer_range && !label->is_bound()) { 659 if (!need_longer_range && !label->is_bound()) {
660 int max_reachable_pc = pc_offset() + Instruction::ImmBranchRange(b_type); 660 int max_reachable_pc = pc_offset() + Instruction::ImmBranchRange(b_type);
661 unresolved_branches_.insert( 661 unresolved_branches_.insert(
662 std::pair<int, FarBranchInfo>(max_reachable_pc, 662 std::pair<int, FarBranchInfo>(max_reachable_pc,
663 FarBranchInfo(pc_offset(), label))); 663 FarBranchInfo(pc_offset(), label)));
664 } 664 }
665 return need_longer_range; 665 return need_longer_range;
666 } 666 }
667 667
668 668
669 void MacroAssembler::B(Label* label, BranchType type, Register reg, int bit) {
670 ASSERT((reg.Is(NoReg) || type >= kBranchTypeFirstUsingReg) &&
671 (bit == -1 || type >= kBranchTypeFirstUsingBit));
672 if (kBranchTypeFirstCondition <= type && type <= kBranchTypeLastCondition) {
673 B(static_cast<Condition>(type), label);
674 } else {
675 switch (type) {
676 case always: B(label); break;
677 case never: break;
678 case reg_zero: Cbz(reg, label); break;
679 case reg_not_zero: Cbnz(reg, label); break;
680 case reg_bit_clear: Tbz(reg, bit, label); break;
681 case reg_bit_set: Tbnz(reg, bit, label); break;
682 default:
683 UNREACHABLE();
684 }
685 }
686 }
687
688
669 void MacroAssembler::B(Label* label, Condition cond) { 689 void MacroAssembler::B(Label* label, Condition cond) {
670 ASSERT(allow_macro_instructions_); 690 ASSERT(allow_macro_instructions_);
671 ASSERT((cond != al) && (cond != nv)); 691 ASSERT((cond != al) && (cond != nv));
672 692
673 Label done; 693 Label done;
674 bool need_extra_instructions = 694 bool need_extra_instructions =
675 NeedExtraInstructionsOrRegisterBranch(label, CondBranchType); 695 NeedExtraInstructionsOrRegisterBranch(label, CondBranchType);
676 696
677 if (need_extra_instructions) { 697 if (need_extra_instructions) {
678 b(&done, InvertCondition(cond)); 698 b(&done, InvertCondition(cond));
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5075 } 5095 }
5076 } 5096 }
5077 5097
5078 5098
5079 #undef __ 5099 #undef __
5080 5100
5081 5101
5082 } } // namespace v8::internal 5102 } } // namespace v8::internal
5083 5103
5084 #endif // V8_TARGET_ARCH_A64 5104 #endif // V8_TARGET_ARCH_A64
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