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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 1706763002: [turbofan] Emit memory operands for cmp and test on ia32 and x64 when it makes sense. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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669 void cmpb(Register reg, const Operand& op); 669 void cmpb(Register reg, const Operand& op);
670 void cmpb(const Operand& op, Register reg); 670 void cmpb(const Operand& op, Register reg);
671 void cmpb_al(const Operand& op); 671 void cmpb_al(const Operand& op);
672 void cmpw_ax(const Operand& op); 672 void cmpw_ax(const Operand& op);
673 void cmpw(const Operand& op, Immediate imm16); 673 void cmpw(const Operand& op, Immediate imm16);
674 void cmp(Register reg, int32_t imm32); 674 void cmp(Register reg, int32_t imm32);
675 void cmp(Register reg, Handle<Object> handle); 675 void cmp(Register reg, Handle<Object> handle);
676 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } 676 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); }
677 void cmp(Register reg, const Operand& op); 677 void cmp(Register reg, const Operand& op);
678 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); } 678 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); }
679 void cmp(const Operand& op, Register reg);
679 void cmp(const Operand& op, const Immediate& imm); 680 void cmp(const Operand& op, const Immediate& imm);
680 void cmp(const Operand& op, Handle<Object> handle); 681 void cmp(const Operand& op, Handle<Object> handle);
681 682
682 void dec_b(Register dst); 683 void dec_b(Register dst);
683 void dec_b(const Operand& dst); 684 void dec_b(const Operand& dst);
684 685
685 void dec(Register dst); 686 void dec(Register dst);
686 void dec(const Operand& dst); 687 void dec(const Operand& dst);
687 688
688 void cdq(); 689 void cdq();
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1568 Assembler* assembler_; 1569 Assembler* assembler_;
1569 #ifdef DEBUG 1570 #ifdef DEBUG
1570 int space_before_; 1571 int space_before_;
1571 #endif 1572 #endif
1572 }; 1573 };
1573 1574
1574 } // namespace internal 1575 } // namespace internal
1575 } // namespace v8 1576 } // namespace v8
1576 1577
1577 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1578 #endif // V8_IA32_ASSEMBLER_IA32_H_
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