Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(7)

Side by Side Diff: src/a64/assembler-a64-inl.h

Issue 170403003: templatize operand constructors (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/a64/assembler-a64.cc ('k') | src/a64/builtins-a64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 246 matching lines...) Expand 10 before | Expand all | Expand 10 after
257 } 257 }
258 258
259 259
260 inline FPRegister CPURegister::D() const { 260 inline FPRegister CPURegister::D() const {
261 ASSERT(IsValidFPRegister()); 261 ASSERT(IsValidFPRegister());
262 return FPRegister::DRegFromCode(reg_code); 262 return FPRegister::DRegFromCode(reg_code);
263 } 263 }
264 264
265 265
266 // Operand. 266 // Operand.
267 #define DECLARE_INT_OPERAND_CONSTRUCTOR(type) \ 267 template<typename T>
268 Operand::Operand(type immediate, RelocInfo::Mode rmode) \ 268 Operand::Operand(Handle<T> value) : reg_(NoReg) {
269 : immediate_(immediate), \ 269 initialize_handle(value);
270 reg_(NoReg), \ 270 }
271 rmode_(rmode) {} 271
272 DECLARE_INT_OPERAND_CONSTRUCTOR(int64_t) 272
273 DECLARE_INT_OPERAND_CONSTRUCTOR(uint64_t) 273 // Default initializer is for int types
274 DECLARE_INT_OPERAND_CONSTRUCTOR(int32_t) // NOLINT(readability/casting) 274 template<typename int_t>
275 DECLARE_INT_OPERAND_CONSTRUCTOR(uint32_t) 275 struct OperandInitializer {
276 #undef DECLARE_INT_OPERAND_CONSTRUCTOR 276 static const bool kIsIntType = true;
277 static inline RelocInfo::Mode rmode_for(int_t) {
278 return sizeof(int_t) == 8 ? RelocInfo::NONE64 : RelocInfo::NONE32;
279 }
280 static inline int64_t immediate_for(int_t t) {
281 STATIC_ASSERT(sizeof(int_t) <= 8);
282 return t;
283 }
284 };
285
286
287 template<>
288 struct OperandInitializer<Smi*> {
289 static const bool kIsIntType = false;
290 static inline RelocInfo::Mode rmode_for(Smi* t) {
291 return RelocInfo::NONE64;
292 }
293 static inline int64_t immediate_for(Smi* t) {;
294 return reinterpret_cast<int64_t>(t);
295 }
296 };
297
298
299 template<>
300 struct OperandInitializer<ExternalReference> {
301 static const bool kIsIntType = false;
302 static inline RelocInfo::Mode rmode_for(ExternalReference t) {
303 return RelocInfo::EXTERNAL_REFERENCE;
304 }
305 static inline int64_t immediate_for(ExternalReference t) {;
306 return reinterpret_cast<int64_t>(t.address());
307 }
308 };
309
310
311 template<typename T>
312 Operand::Operand(T t)
313 : immediate_(OperandInitializer<T>::immediate_for(t)),
314 reg_(NoReg),
315 rmode_(OperandInitializer<T>::rmode_for(t)) {}
316
317
318 template<typename T>
319 Operand::Operand(T t, RelocInfo::Mode rmode)
320 : immediate_(OperandInitializer<T>::immediate_for(t)),
321 reg_(NoReg),
322 rmode_(rmode) {
323 STATIC_ASSERT(OperandInitializer<T>::kIsIntType);
324 }
325
277 326
278 Operand::Operand(Register reg, Shift shift, unsigned shift_amount) 327 Operand::Operand(Register reg, Shift shift, unsigned shift_amount)
279 : reg_(reg), 328 : reg_(reg),
280 shift_(shift), 329 shift_(shift),
281 extend_(NO_EXTEND), 330 extend_(NO_EXTEND),
282 shift_amount_(shift_amount), 331 shift_amount_(shift_amount),
283 rmode_(reg.Is64Bits() ? RelocInfo::NONE64 : RelocInfo::NONE32) { 332 rmode_(reg.Is64Bits() ? RelocInfo::NONE64 : RelocInfo::NONE32) {
284 ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize)); 333 ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize));
285 ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); 334 ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize));
286 ASSERT(!reg.IsSP()); 335 ASSERT(!reg.IsSP());
287 } 336 }
288 337
289 338
290 Operand::Operand(Register reg, Extend extend, unsigned shift_amount) 339 Operand::Operand(Register reg, Extend extend, unsigned shift_amount)
291 : reg_(reg), 340 : reg_(reg),
292 shift_(NO_SHIFT), 341 shift_(NO_SHIFT),
293 extend_(extend), 342 extend_(extend),
294 shift_amount_(shift_amount), 343 shift_amount_(shift_amount),
295 rmode_(reg.Is64Bits() ? RelocInfo::NONE64 : RelocInfo::NONE32) { 344 rmode_(reg.Is64Bits() ? RelocInfo::NONE64 : RelocInfo::NONE32) {
296 ASSERT(reg.IsValid()); 345 ASSERT(reg.IsValid());
297 ASSERT(shift_amount <= 4); 346 ASSERT(shift_amount <= 4);
298 ASSERT(!reg.IsSP()); 347 ASSERT(!reg.IsSP());
299 348
300 // Extend modes SXTX and UXTX require a 64-bit register. 349 // Extend modes SXTX and UXTX require a 64-bit register.
301 ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); 350 ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
302 } 351 }
303 352
304 353
305 Operand::Operand(Smi* value)
306 : immediate_(reinterpret_cast<intptr_t>(value)),
307 reg_(NoReg),
308 rmode_(RelocInfo::NONE64) {}
309
310
311 bool Operand::IsImmediate() const { 354 bool Operand::IsImmediate() const {
312 return reg_.Is(NoReg); 355 return reg_.Is(NoReg);
313 } 356 }
314 357
315 358
316 bool Operand::IsShiftedRegister() const { 359 bool Operand::IsShiftedRegister() const {
317 return reg_.IsValid() && (shift_ != NO_SHIFT); 360 return reg_.IsValid() && (shift_ != NO_SHIFT);
318 } 361 }
319 362
320 363
(...skipping 817 matching lines...) Expand 10 before | Expand all | Expand 10 after
1138 1181
1139 1182
1140 void Assembler::ClearRecordedAstId() { 1183 void Assembler::ClearRecordedAstId() {
1141 recorded_ast_id_ = TypeFeedbackId::None(); 1184 recorded_ast_id_ = TypeFeedbackId::None();
1142 } 1185 }
1143 1186
1144 1187
1145 } } // namespace v8::internal 1188 } } // namespace v8::internal
1146 1189
1147 #endif // V8_A64_ASSEMBLER_A64_INL_H_ 1190 #endif // V8_A64_ASSEMBLER_A64_INL_H_
OLDNEW
« no previous file with comments | « src/a64/assembler-a64.cc ('k') | src/a64/builtins-a64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698