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Issue 1699173003: [Atomics] Add dmb/dsb/isb instructions to ARM (Closed) Base URL: http://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 10 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_ARM 9 #if V8_TARGET_ARCH_ARM
10 10
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3905 } 3905 }
3906 } 3906 }
3907 } else { 3907 } else {
3908 UNIMPLEMENTED(); 3908 UNIMPLEMENTED();
3909 } 3909 }
3910 break; 3910 break;
3911 case 0xA: 3911 case 0xA:
3912 case 0xB: 3912 case 0xB:
3913 if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) { 3913 if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
3914 // pld: ignore instruction. 3914 // pld: ignore instruction.
3915 } else if (instr->SpecialValue() == 0xA && instr->Bits(22, 20) == 7) {
3916 // dsb, dmb, isb: ignore instruction for now.
3917 // TODO(binji): implement
3915 } else { 3918 } else {
3916 UNIMPLEMENTED(); 3919 UNIMPLEMENTED();
3917 } 3920 }
3918 break; 3921 break;
3919 case 0x1D: 3922 case 0x1D:
3920 if (instr->Opc1Value() == 0x7 && instr->Opc3Value() == 0x1 && 3923 if (instr->Opc1Value() == 0x7 && instr->Opc3Value() == 0x1 &&
3921 instr->Bits(11, 9) == 0x5 && instr->Bits(19, 18) == 0x2) { 3924 instr->Bits(11, 9) == 0x5 && instr->Bits(19, 18) == 0x2) {
3922 if (instr->SzValue() == 0x1) { 3925 if (instr->SzValue() == 0x1) {
3923 int vm = instr->VFPMRegValue(kDoublePrecision); 3926 int vm = instr->VFPMRegValue(kDoublePrecision);
3924 int vd = instr->VFPDRegValue(kDoublePrecision); 3927 int vd = instr->VFPDRegValue(kDoublePrecision);
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4223 set_register(sp, current_sp + sizeof(uintptr_t)); 4226 set_register(sp, current_sp + sizeof(uintptr_t));
4224 return address; 4227 return address;
4225 } 4228 }
4226 4229
4227 } // namespace internal 4230 } // namespace internal
4228 } // namespace v8 4231 } // namespace v8
4229 4232
4230 #endif // USE_SIMULATOR 4233 #endif // USE_SIMULATOR
4231 4234
4232 #endif // V8_TARGET_ARCH_ARM 4235 #endif // V8_TARGET_ARCH_ARM
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